diff options
-rw-r--r-- | testsuite/gna/bug0109/err.vhdl | 33 | ||||
-rw-r--r-- | testsuite/gna/bug0109/ok.vhdl | 60 | ||||
-rw-r--r-- | testsuite/gna/bug0109/repro.vhdl | 36 | ||||
-rwxr-xr-x | testsuite/gna/bug0109/testsuite.sh | 17 |
4 files changed, 146 insertions, 0 deletions
diff --git a/testsuite/gna/bug0109/err.vhdl b/testsuite/gna/bug0109/err.vhdl new file mode 100644 index 000000000..80bb88d69 --- /dev/null +++ b/testsuite/gna/bug0109/err.vhdl @@ -0,0 +1,33 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.fixed_pkg.all; + + +entity phz_calc is +end entity phz_calc; + +architecture behavioral of phz_calc is + function to_string (inp: sfixed) return string is + variable image_str: string (1 to inp'length + 1); + variable j: integer range 1 to image_str'length + 1; + begin + j := 1; + for i in inp'range loop + if i = -1 then + image_str(j) := '.'; + j := j + 1; + end if; + image_str(j) := character'VALUE(std_ulogic'IMAGE(inp(i))); + j := j + 1; + end loop; + return image_str; + end function; +begin + process + variable z: sfixed (3 downto -3); + begin + z := to_sfixed(3.2,3,-3); + report "z = " & to_string (z); + wait; + end process; +end architecture behavioral; diff --git a/testsuite/gna/bug0109/ok.vhdl b/testsuite/gna/bug0109/ok.vhdl new file mode 100644 index 000000000..487fe2647 --- /dev/null +++ b/testsuite/gna/bug0109/ok.vhdl @@ -0,0 +1,60 @@ +library ieee; +use ieee.std_logic_1164.all; + +package foo_pkg is + type unresolved_sfixed is array (integer range <>) of std_ulogic; + subtype sfixed is (resolved) UNRESOLVED_sfixed; + function to_string (inp: unresolved_sfixed) return string; +end package foo_pkg; + +package body foo_pkg is + function to_string (inp: unresolved_sfixed) return string is + variable image_str: string (1 to inp'length + 1); + variable j: integer range 1 to image_str'length + 1; + begin + j := 1; + for i in inp'range loop + + if i = -1 then + image_str(j) := ','; + j := j + 1; + end if; + image_str(j) := character'VALUE(std_ulogic'IMAGE(inp(i))); + j := j + 1; + end loop; + return image_str; + end function; +end package body foo_pkg; + +library ieee; +use ieee.std_logic_1164.all; +use work.foo_pkg.all; + +entity foo is +end entity; + +architecture fum of foo is + constant sfixed_val: sfixed (3 downto -4):= x"da"; + function to_string (inp: sfixed) return string is + variable image_str: string (1 to inp'length + 1); + variable j: integer range 1 to image_str'length + 1; + begin + j := 1; + for i in inp'range loop + + if i = -1 then + image_str(j) := '.'; + j := j + 1; + end if; + image_str(j) := character'VALUE(std_ulogic'IMAGE(inp(i))); + j := j + 1; + end loop; + return image_str; + end function; +begin + process + begin + report "sfixed_val = " & to_string(sfixed_val); + wait; + end process; +end architecture; diff --git a/testsuite/gna/bug0109/repro.vhdl b/testsuite/gna/bug0109/repro.vhdl new file mode 100644 index 000000000..6e46376ff --- /dev/null +++ b/testsuite/gna/bug0109/repro.vhdl @@ -0,0 +1,36 @@ +package my_pkg_gen is + generic (type el_type); + + type sfixed is array (integer range <>) of el_type; + function to_string (inp: sfixed) return string; +end my_pkg_gen; + +package body my_pkg_gen is + function to_string (inp: sfixed) return string is + begin + return "image-pkg"; + end to_string; +end my_pkg_gen; + +package my_pkg is new work.my_pkg_gen generic map (el_type => bit); + + + +use work.my_pkg.all; +entity repro is +end; + +architecture behavioral of repro is + function to_string (inp: sfixed) return string is + begin + return "image-ent"; + end function; +begin + process + variable z: sfixed (3 downto -3); + begin + z := "1111000"; + report "z = " & to_string (z); + wait; + end process; +end architecture behavioral; diff --git a/testsuite/gna/bug0109/testsuite.sh b/testsuite/gna/bug0109/testsuite.sh new file mode 100755 index 000000000..e83e9f4d7 --- /dev/null +++ b/testsuite/gna/bug0109/testsuite.sh @@ -0,0 +1,17 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +analyze repro.vhdl +elab_simulate repro + +analyze err.vhdl +elab_simulate phz_calc + +analyze ok.vhdl +elab_simulate foo + +clean + +echo "Test successful" |