diff options
| -rw-r--r-- | pyGHDL/dom/Concurrent.py | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py index c9a67f1e1..6b07ff3ae 100644 --- a/pyGHDL/dom/Concurrent.py +++ b/pyGHDL/dom/Concurrent.py @@ -44,10 +44,9 @@ from pyVHDLModel.SyntaxModel import ( IfGenerateStatement as VHDLModel_IfGenerateStatement, CaseGenerateStatement as VHDLModel_CaseGenerateStatement, ForGenerateStatement as VHDLModel_ForGenerateStatement, - ConcurrentStatement, Name, + ConcurrentStatement, SequentialStatement, - IfGenerateBranch, Expression, ) @@ -256,12 +255,15 @@ class IfGenerateStatement(VHDLModel_IfGenerateStatement, DOMMixin): print(generateNode, GetIirKindOfNode(generateNode)) ifBranch = IfGenerateBranch.parse(generateNode) - elseClause = generateNode - while ( - elseClause := nodes.Get_Generate_Else_Clause(elseClause) - ) != nodes.Null_Iir: +# Python 3.8 syntax +# elseClause = generateNode +# while (elseClause := nodes.Get_Generate_Else_Clause(elseClause)) != nodes.Null_Iir: + elseClause = nodes.Get_Generate_Else_Clause(generateNode) + while elseClause != nodes.Null_Iir: print(elseClause, GetIirKindOfNode(elseClause)) + elseClause = nodes.Get_Generate_Else_Clause(elseClause) + return cls(generateNode, label, ifBranch) |