diff options
| -rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 374 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-std_logic_unsigned.adb | 124 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 36 |
3 files changed, 328 insertions, 206 deletions
diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index b7fdf7ea8..75930441c 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1419,180 +1419,206 @@ class Iir_Predefined: Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 422 Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 423 Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 424 - Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 425 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 426 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 427 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 428 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 429 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 430 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 431 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 432 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 433 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 434 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 435 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 436 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 437 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 438 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 439 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 440 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 441 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 442 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 443 - Ieee_Std_Logic_Unsigned_Conv_Integer = 444 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 445 - Ieee_Std_Logic_Signed_Add_Slv_Int = 446 - Ieee_Std_Logic_Signed_Add_Int_Slv = 447 - Ieee_Std_Logic_Signed_Add_Slv_Log = 448 - Ieee_Std_Logic_Signed_Add_Log_Slv = 449 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 450 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 451 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 452 - Ieee_Std_Logic_Signed_Sub_Slv_Log = 453 - Ieee_Std_Logic_Signed_Sub_Log_Slv = 454 - Ieee_Std_Logic_Signed_Mul_Slv_Slv = 455 - Ieee_Std_Logic_Signed_Conv_Integer = 456 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 457 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 458 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 459 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 460 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 461 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 462 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 463 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 464 - Ieee_Std_Logic_Arith_Conv_Vector_Int = 465 - Ieee_Std_Logic_Arith_Conv_Vector_Uns = 466 - Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 467 - Ieee_Std_Logic_Arith_Conv_Vector_Log = 468 - Ieee_Std_Logic_Arith_Ext = 469 - Ieee_Std_Logic_Arith_Sxt = 470 - Ieee_Std_Logic_Arith_Id_Uns_Uns = 471 - Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 472 - Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 473 - Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 474 - Ieee_Std_Logic_Arith_Shl_Uns = 475 - Ieee_Std_Logic_Arith_Shl_Sgn = 476 - Ieee_Std_Logic_Arith_Shr_Uns = 477 - Ieee_Std_Logic_Arith_Shr_Sgn = 478 - Ieee_Std_Logic_Arith_Id_Uns_Slv = 479 - Ieee_Std_Logic_Arith_Id_Sgn_Slv = 480 - Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 481 - Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 482 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 483 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 484 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 485 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 486 - Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 487 - Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 488 - Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 489 - Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 490 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 491 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 492 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 493 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 494 - Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 495 - Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 496 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 497 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 498 - Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 499 - Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 500 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 501 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 502 - Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 503 - Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 504 - Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 505 - Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 506 - Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 507 - Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 508 - Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 509 - Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 510 - Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 511 - Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 512 - Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 513 - Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 514 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 515 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 516 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 517 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 518 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 519 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 520 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 521 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 522 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 523 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 524 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 525 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 526 - Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 527 - Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 528 - Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 529 - Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 530 - Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 531 - Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 532 - Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 533 - Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 534 - Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 535 - Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 536 - Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 537 - Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 538 - Ieee_Std_Logic_Arith_Lt_Uns_Uns = 539 - Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 540 - Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 541 - Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 542 - Ieee_Std_Logic_Arith_Lt_Uns_Int = 543 - Ieee_Std_Logic_Arith_Lt_Int_Uns = 544 - Ieee_Std_Logic_Arith_Lt_Sgn_Int = 545 - Ieee_Std_Logic_Arith_Lt_Int_Sgn = 546 - Ieee_Std_Logic_Arith_Le_Uns_Uns = 547 - Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 548 - Ieee_Std_Logic_Arith_Le_Uns_Sgn = 549 - Ieee_Std_Logic_Arith_Le_Sgn_Uns = 550 - Ieee_Std_Logic_Arith_Le_Uns_Int = 551 - Ieee_Std_Logic_Arith_Le_Int_Uns = 552 - Ieee_Std_Logic_Arith_Le_Sgn_Int = 553 - Ieee_Std_Logic_Arith_Le_Int_Sgn = 554 - Ieee_Std_Logic_Arith_Gt_Uns_Uns = 555 - Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 556 - Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 557 - Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 558 - Ieee_Std_Logic_Arith_Gt_Uns_Int = 559 - Ieee_Std_Logic_Arith_Gt_Int_Uns = 560 - Ieee_Std_Logic_Arith_Gt_Sgn_Int = 561 - Ieee_Std_Logic_Arith_Gt_Int_Sgn = 562 - Ieee_Std_Logic_Arith_Ge_Uns_Uns = 563 - Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 564 - Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 565 - Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 566 - Ieee_Std_Logic_Arith_Ge_Uns_Int = 567 - Ieee_Std_Logic_Arith_Ge_Int_Uns = 568 - Ieee_Std_Logic_Arith_Ge_Sgn_Int = 569 - Ieee_Std_Logic_Arith_Ge_Int_Sgn = 570 - Ieee_Std_Logic_Arith_Eq_Uns_Uns = 571 - Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 572 - Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 573 - Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 574 - Ieee_Std_Logic_Arith_Eq_Uns_Int = 575 - Ieee_Std_Logic_Arith_Eq_Int_Uns = 576 - Ieee_Std_Logic_Arith_Eq_Sgn_Int = 577 - Ieee_Std_Logic_Arith_Eq_Int_Sgn = 578 - Ieee_Std_Logic_Arith_Ne_Uns_Uns = 579 - Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 580 - Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 581 - Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 582 - Ieee_Std_Logic_Arith_Ne_Uns_Int = 583 - Ieee_Std_Logic_Arith_Ne_Int_Uns = 584 - Ieee_Std_Logic_Arith_Ne_Sgn_Int = 585 - Ieee_Std_Logic_Arith_Ne_Int_Sgn = 586 - Ieee_Std_Logic_Misc_And_Reduce_Slv = 587 - Ieee_Std_Logic_Misc_And_Reduce_Suv = 588 - Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 589 - Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 590 - Ieee_Std_Logic_Misc_Or_Reduce_Slv = 591 - Ieee_Std_Logic_Misc_Or_Reduce_Suv = 592 - Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 593 - Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 594 - Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 595 - Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 596 - Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 597 - Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 598 + Ieee_Std_Logic_Unsigned_Id_Slv = 425 + Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 426 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 427 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 428 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 429 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 430 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 431 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 432 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 433 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 434 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 435 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 436 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 437 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 438 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 439 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 440 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 441 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 442 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 443 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 444 + Ieee_Std_Logic_Unsigned_Conv_Integer = 445 + Ieee_Std_Logic_Unsigned_Shl = 446 + Ieee_Std_Logic_Unsigned_Shr = 447 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 448 + Ieee_Std_Logic_Signed_Add_Slv_Int = 449 + Ieee_Std_Logic_Signed_Add_Int_Slv = 450 + Ieee_Std_Logic_Signed_Add_Slv_Log = 451 + Ieee_Std_Logic_Signed_Add_Log_Slv = 452 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 453 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 454 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 455 + Ieee_Std_Logic_Signed_Sub_Slv_Log = 456 + Ieee_Std_Logic_Signed_Sub_Log_Slv = 457 + Ieee_Std_Logic_Signed_Id_Slv = 458 + Ieee_Std_Logic_Signed_Neg_Slv = 459 + Ieee_Std_Logic_Signed_Abs_Slv = 460 + Ieee_Std_Logic_Signed_Mul_Slv_Slv = 461 + Ieee_Std_Logic_Signed_Lt_Slv_Slv = 462 + Ieee_Std_Logic_Signed_Lt_Slv_Int = 463 + Ieee_Std_Logic_Signed_Lt_Int_Slv = 464 + Ieee_Std_Logic_Signed_Le_Slv_Slv = 465 + Ieee_Std_Logic_Signed_Le_Slv_Int = 466 + Ieee_Std_Logic_Signed_Le_Int_Slv = 467 + Ieee_Std_Logic_Signed_Gt_Slv_Slv = 468 + Ieee_Std_Logic_Signed_Gt_Slv_Int = 469 + Ieee_Std_Logic_Signed_Gt_Int_Slv = 470 + Ieee_Std_Logic_Signed_Ge_Slv_Slv = 471 + Ieee_Std_Logic_Signed_Ge_Slv_Int = 472 + Ieee_Std_Logic_Signed_Ge_Int_Slv = 473 + Ieee_Std_Logic_Signed_Eq_Slv_Slv = 474 + Ieee_Std_Logic_Signed_Eq_Slv_Int = 475 + Ieee_Std_Logic_Signed_Eq_Int_Slv = 476 + Ieee_Std_Logic_Signed_Ne_Slv_Slv = 477 + Ieee_Std_Logic_Signed_Ne_Slv_Int = 478 + Ieee_Std_Logic_Signed_Ne_Int_Slv = 479 + Ieee_Std_Logic_Signed_Conv_Integer = 480 + Ieee_Std_Logic_Signed_Shl = 481 + Ieee_Std_Logic_Signed_Shr = 482 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 483 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 484 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 485 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 486 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 487 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 488 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 489 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 490 + Ieee_Std_Logic_Arith_Conv_Vector_Int = 491 + Ieee_Std_Logic_Arith_Conv_Vector_Uns = 492 + Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 493 + Ieee_Std_Logic_Arith_Conv_Vector_Log = 494 + Ieee_Std_Logic_Arith_Ext = 495 + Ieee_Std_Logic_Arith_Sxt = 496 + Ieee_Std_Logic_Arith_Id_Uns_Uns = 497 + Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 498 + Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 499 + Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 500 + Ieee_Std_Logic_Arith_Shl_Uns = 501 + Ieee_Std_Logic_Arith_Shl_Sgn = 502 + Ieee_Std_Logic_Arith_Shr_Uns = 503 + Ieee_Std_Logic_Arith_Shr_Sgn = 504 + Ieee_Std_Logic_Arith_Id_Uns_Slv = 505 + Ieee_Std_Logic_Arith_Id_Sgn_Slv = 506 + Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 507 + Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 508 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 509 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 510 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 511 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 512 + Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 513 + Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 514 + Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 515 + Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 516 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 517 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 518 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 519 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 520 + Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 521 + Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 522 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 523 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 524 + Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 525 + Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 526 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 527 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 528 + Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 529 + Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 530 + Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 531 + Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 532 + Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 533 + Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 534 + Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 535 + Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 536 + Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 537 + Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 538 + Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 539 + Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 540 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 541 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 542 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 543 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 544 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 545 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 546 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 547 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 548 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 549 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 550 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 551 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 552 + Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 553 + Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 554 + Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 555 + Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 556 + Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 557 + Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 558 + Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 559 + Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 560 + Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 561 + Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 562 + Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 563 + Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 564 + Ieee_Std_Logic_Arith_Lt_Uns_Uns = 565 + Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 566 + Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 567 + Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 568 + Ieee_Std_Logic_Arith_Lt_Uns_Int = 569 + Ieee_Std_Logic_Arith_Lt_Int_Uns = 570 + Ieee_Std_Logic_Arith_Lt_Sgn_Int = 571 + Ieee_Std_Logic_Arith_Lt_Int_Sgn = 572 + Ieee_Std_Logic_Arith_Le_Uns_Uns = 573 + Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 574 + Ieee_Std_Logic_Arith_Le_Uns_Sgn = 575 + Ieee_Std_Logic_Arith_Le_Sgn_Uns = 576 + Ieee_Std_Logic_Arith_Le_Uns_Int = 577 + Ieee_Std_Logic_Arith_Le_Int_Uns = 578 + Ieee_Std_Logic_Arith_Le_Sgn_Int = 579 + Ieee_Std_Logic_Arith_Le_Int_Sgn = 580 + Ieee_Std_Logic_Arith_Gt_Uns_Uns = 581 + Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 582 + Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 583 + Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 584 + Ieee_Std_Logic_Arith_Gt_Uns_Int = 585 + Ieee_Std_Logic_Arith_Gt_Int_Uns = 586 + Ieee_Std_Logic_Arith_Gt_Sgn_Int = 587 + Ieee_Std_Logic_Arith_Gt_Int_Sgn = 588 + Ieee_Std_Logic_Arith_Ge_Uns_Uns = 589 + Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 590 + Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 591 + Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 592 + Ieee_Std_Logic_Arith_Ge_Uns_Int = 593 + Ieee_Std_Logic_Arith_Ge_Int_Uns = 594 + Ieee_Std_Logic_Arith_Ge_Sgn_Int = 595 + Ieee_Std_Logic_Arith_Ge_Int_Sgn = 596 + Ieee_Std_Logic_Arith_Eq_Uns_Uns = 597 + Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 598 + Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 599 + Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 600 + Ieee_Std_Logic_Arith_Eq_Uns_Int = 601 + Ieee_Std_Logic_Arith_Eq_Int_Uns = 602 + Ieee_Std_Logic_Arith_Eq_Sgn_Int = 603 + Ieee_Std_Logic_Arith_Eq_Int_Sgn = 604 + Ieee_Std_Logic_Arith_Ne_Uns_Uns = 605 + Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 606 + Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 607 + Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 608 + Ieee_Std_Logic_Arith_Ne_Uns_Int = 609 + Ieee_Std_Logic_Arith_Ne_Int_Uns = 610 + Ieee_Std_Logic_Arith_Ne_Sgn_Int = 611 + Ieee_Std_Logic_Arith_Ne_Int_Sgn = 612 + Ieee_Std_Logic_Misc_And_Reduce_Slv = 613 + Ieee_Std_Logic_Misc_And_Reduce_Suv = 614 + Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 615 + Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 616 + Ieee_Std_Logic_Misc_Or_Reduce_Slv = 617 + Ieee_Std_Logic_Misc_Or_Reduce_Suv = 618 + Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 619 + Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 620 + Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 621 + Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 622 + Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 623 + Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 624 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/vhdl/vhdl-ieee-std_logic_unsigned.adb b/src/vhdl/vhdl-ieee-std_logic_unsigned.adb index 3eb76cd11..b57c0aa7a 100644 --- a/src/vhdl/vhdl-ieee-std_logic_unsigned.adb +++ b/src/vhdl/vhdl-ieee-std_logic_unsigned.adb @@ -27,45 +27,80 @@ package body Vhdl.Ieee.Std_Logic_Unsigned is type Binary_Pattern_Type is array (Args_Kind) of Iir_Predefined_Functions; - None_Patterns : constant Binary_Pattern_Type := - (others => Iir_Predefined_None); + type Unary_Pattern_Type is array (Sign_Kind) of Iir_Predefined_Functions; - Eq_Patterns : constant Binary_Pattern_Type := + Eq_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Eq_Int_Slv, others => Iir_Predefined_None); - Ne_Patterns : constant Binary_Pattern_Type := + Eq_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Int_Slv, + others => Iir_Predefined_None); + + Ne_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Int_Slv, others => Iir_Predefined_None); - Lt_Patterns : constant Binary_Pattern_Type := + Ne_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Int_Slv, + others => Iir_Predefined_None); + + Lt_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Int_Slv, others => Iir_Predefined_None); - Le_Patterns : constant Binary_Pattern_Type := + Lt_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Int_Slv, + others => Iir_Predefined_None); + + Le_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Le_Int_Slv, others => Iir_Predefined_None); - Gt_Patterns : constant Binary_Pattern_Type := + Le_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Le_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Le_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Le_Int_Slv, + others => Iir_Predefined_None); + + Gt_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Gt_Int_Slv, others => Iir_Predefined_None); - Ge_Patterns : constant Binary_Pattern_Type := + Gt_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Int_Slv, + others => Iir_Predefined_None); + + Ge_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Slv_Int, Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Ge_Int_Slv, others => Iir_Predefined_None); + Ge_Sgn_Patterns : constant Binary_Pattern_Type := + (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Slv_Slv, + Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Slv_Int, + Arg_Int_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Int_Slv, + others => Iir_Predefined_None); + Add_Uns_Patterns : constant Binary_Pattern_Type := (Arg_Slv_Slv => Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, Arg_Slv_Int => Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Int, @@ -94,6 +129,26 @@ package body Vhdl.Ieee.Std_Logic_Unsigned is Arg_Slv_Log => Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Slv_Log, Arg_Log_Slv => Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Log_Slv); + Id_Patterns : constant Unary_Pattern_Type := + (Pkg_Unsigned => Iir_Predefined_Ieee_Std_Logic_Unsigned_Id_Slv, + Pkg_Signed => Iir_Predefined_Ieee_Std_Logic_Signed_Id_Slv); + + Conv_Patterns : constant Unary_Pattern_Type := + (Pkg_Unsigned => Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer, + Pkg_Signed => Iir_Predefined_Ieee_Std_Logic_Signed_Conv_Integer); + + Mul_Patterns : constant Unary_Pattern_Type := + (Pkg_Unsigned => Iir_Predefined_Ieee_Std_Logic_Unsigned_Mul_Slv_Slv, + Pkg_Signed => Iir_Predefined_Ieee_Std_Logic_Signed_Mul_Slv_Slv); + + Shl_Patterns : constant Unary_Pattern_Type := + (Pkg_Unsigned => Iir_Predefined_Ieee_Std_Logic_Unsigned_Shl, + Pkg_Signed => Iir_Predefined_Ieee_Std_Logic_Signed_Shl); + + Shr_Patterns : constant Unary_Pattern_Type := + (Pkg_Unsigned => Iir_Predefined_Ieee_Std_Logic_Unsigned_Shr, + Pkg_Signed => Iir_Predefined_Ieee_Std_Logic_Signed_Shr); + Error : exception; procedure Classify_Arg (Arg : Iir; Kind : out Arg_Kind) @@ -168,33 +223,33 @@ package body Vhdl.Ieee.Std_Logic_Unsigned is case Get_Identifier (Decl) is when Name_Op_Equality => - Res := Handle_Binary (Eq_Patterns, None_Patterns); + Res := Handle_Binary (Eq_Uns_Patterns, Eq_Sgn_Patterns); when Name_Op_Inequality => - Res := Handle_Binary (Ne_Patterns, None_Patterns); + Res := Handle_Binary (Ne_Uns_Patterns, Ne_Sgn_Patterns); when Name_Op_Less => - Res := Handle_Binary (Lt_Patterns, None_Patterns); + Res := Handle_Binary (Lt_Uns_Patterns, Lt_Sgn_Patterns); when Name_Op_Less_Equal => - Res := Handle_Binary (Le_Patterns, None_Patterns); + Res := Handle_Binary (Le_Uns_Patterns, Le_Sgn_Patterns); when Name_Op_Greater => - Res := Handle_Binary (Gt_Patterns, None_Patterns); + Res := Handle_Binary (Gt_Uns_Patterns, Gt_Sgn_Patterns); when Name_Op_Greater_Equal => - Res := Handle_Binary (Ge_Patterns, None_Patterns); + Res := Handle_Binary (Ge_Uns_Patterns, Ge_Sgn_Patterns); when Name_Op_Plus => Res := Handle_Binary (Add_Uns_Patterns, Add_Sgn_Patterns); when Name_Op_Minus => Res := Handle_Binary (Sub_Uns_Patterns, Sub_Sgn_Patterns); when Name_Op_Mul => - case Sign is - when Pkg_Unsigned => - pragma Assert (Arg1_Kind = Arg_Slv); - pragma Assert (Arg2_Kind = Arg_Slv); - Res := Iir_Predefined_Ieee_Std_Logic_Unsigned_Mul_Slv_Slv; - when Pkg_Signed => - pragma Assert (Arg1_Kind = Arg_Slv); - pragma Assert (Arg2_Kind = Arg_Slv); - Res := - Iir_Predefined_Ieee_Std_Logic_Signed_Mul_Slv_Slv; - end case; + pragma Assert (Arg1_Kind = Arg_Slv); + pragma Assert (Arg2_Kind = Arg_Slv); + Res := Mul_Patterns (Sign); + when Name_Shl => + pragma Assert (Arg1_Kind = Arg_Slv); + pragma Assert (Arg2_Kind = Arg_Slv); + Res := Shl_Patterns (Sign); + when Name_Shr => + pragma Assert (Arg1_Kind = Arg_Slv); + pragma Assert (Arg2_Kind = Arg_Slv); + Res := Shr_Patterns (Sign); when others => null; end case; @@ -202,13 +257,18 @@ package body Vhdl.Ieee.Std_Logic_Unsigned is -- Monadic function. case Get_Identifier (Decl) is when Name_Conv_Integer => - case Sign is - when Pkg_Unsigned => - Res := - Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer; - when Pkg_Signed => - Res := Iir_Predefined_Ieee_Std_Logic_Signed_Conv_Integer; - end case; + Res := Conv_Patterns (Sign); + when Name_Op_Plus => + pragma Assert (Arg1_Kind = Arg_Slv); + Res := Id_Patterns (Sign); + when Name_Op_Minus => + if Sign = Pkg_Signed and Arg1_Kind = Arg_Slv then + Res := Iir_Predefined_Ieee_Std_Logic_Signed_Neg_Slv; + end if; + when Name_Abs => + if Sign = Pkg_Signed and Arg1_Kind = Arg_Slv then + Res := Iir_Predefined_Ieee_Std_Logic_Signed_Abs_Slv; + end if; when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index a08e12d97..eeaf86c72 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5824,6 +5824,8 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Unsigned_Sub_Slv_Log, Iir_Predefined_Ieee_Std_Logic_Unsigned_Sub_Log_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Id_Slv, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Mul_Slv_Slv, Iir_Predefined_Ieee_Std_Logic_Unsigned_Lt_Slv_Slv, @@ -5852,6 +5854,9 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Unsigned_Conv_Integer, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Shl, + Iir_Predefined_Ieee_Std_Logic_Unsigned_Shr, + -- Std_Logic_Signed (synopsys extension). Iir_Predefined_Ieee_Std_Logic_Signed_Add_Slv_Slv, Iir_Predefined_Ieee_Std_Logic_Signed_Add_Slv_Int, @@ -5865,10 +5870,41 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Slv_Log, Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Log_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Id_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Neg_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Abs_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Mul_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Lt_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Le_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Le_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Le_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Gt_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Ge_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Eq_Int_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Ne_Int_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Conv_Integer, + Iir_Predefined_Ieee_Std_Logic_Signed_Shl, + Iir_Predefined_Ieee_Std_Logic_Signed_Shr, + -- std_logic_arith (synopsys extention). Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns, |