diff options
-rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 256 | ||||
-rw-r--r-- | python/libghdl/thin/vhdl/nodes_meta.py | 12 | ||||
-rw-r--r-- | python/libghdl/thin/vhdl/tokens.py | 4 | ||||
-rw-r--r-- | src/ghdldrv/ghdlprint.adb | 62 | ||||
-rw-r--r-- | src/vhdl/vhdl-elocations.adb | 4 | ||||
-rw-r--r-- | src/vhdl/vhdl-elocations.ads | 4 | ||||
-rw-r--r-- | src/vhdl/vhdl-errors.adb | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.adb | 52 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes.ads | 48 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes_meta.adb | 329 | ||||
-rw-r--r-- | src/vhdl/vhdl-nodes_meta.ads | 8 | ||||
-rw-r--r-- | src/vhdl/vhdl-parse.adb | 67 | ||||
-rw-r--r-- | src/vhdl/vhdl-prints.adb | 26 | ||||
-rw-r--r-- | src/vhdl/vhdl-scanner.adb | 102 | ||||
-rw-r--r-- | src/vhdl/vhdl-tokens.adb | 10 | ||||
-rw-r--r-- | src/vhdl/vhdl-tokens.ads | 7 | ||||
-rw-r--r-- | src/vhdl/vhdl-utils.adb | 140 |
17 files changed, 761 insertions, 378 deletions
diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 1c15d0bae..aebd73dad 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -205,120 +205,124 @@ class Iir_Kind: Implicit_Dereference = 190 Slice_Name = 191 Indexed_Name = 192 - Psl_Expression = 193 - Sensitized_Process_Statement = 194 - Process_Statement = 195 - Concurrent_Simple_Signal_Assignment = 196 - Concurrent_Conditional_Signal_Assignment = 197 - Concurrent_Selected_Signal_Assignment = 198 - Concurrent_Assertion_Statement = 199 - Concurrent_Procedure_Call_Statement = 200 - Concurrent_Break_Statement = 201 - Psl_Assert_Directive = 202 - Psl_Assume_Directive = 203 - Psl_Cover_Directive = 204 - Psl_Restrict_Directive = 205 - Block_Statement = 206 - If_Generate_Statement = 207 - Case_Generate_Statement = 208 - For_Generate_Statement = 209 - Component_Instantiation_Statement = 210 - Psl_Default_Clock = 211 - Generate_Statement_Body = 212 - If_Generate_Else_Clause = 213 - Simple_Simultaneous_Statement = 214 - Simultaneous_Null_Statement = 215 - Simultaneous_Procedural_Statement = 216 - Simultaneous_Case_Statement = 217 - Simultaneous_If_Statement = 218 - Simultaneous_Elsif = 219 - Simple_Signal_Assignment_Statement = 220 - Conditional_Signal_Assignment_Statement = 221 - Selected_Waveform_Assignment_Statement = 222 - Null_Statement = 223 - Assertion_Statement = 224 - Report_Statement = 225 - Wait_Statement = 226 - Variable_Assignment_Statement = 227 - Conditional_Variable_Assignment_Statement = 228 - Return_Statement = 229 - For_Loop_Statement = 230 - While_Loop_Statement = 231 - Next_Statement = 232 - Exit_Statement = 233 - Case_Statement = 234 - Procedure_Call_Statement = 235 - Break_Statement = 236 - If_Statement = 237 - Elsif = 238 - Character_Literal = 239 - Simple_Name = 240 - Selected_Name = 241 - Operator_Symbol = 242 - Reference_Name = 243 - External_Constant_Name = 244 - External_Signal_Name = 245 - External_Variable_Name = 246 - Selected_By_All_Name = 247 - Parenthesis_Name = 248 - Package_Pathname = 249 - Absolute_Pathname = 250 - Relative_Pathname = 251 - Pathname_Element = 252 - Base_Attribute = 253 - Subtype_Attribute = 254 - Element_Attribute = 255 - Across_Attribute = 256 - Through_Attribute = 257 - Nature_Reference_Attribute = 258 - Left_Type_Attribute = 259 - Right_Type_Attribute = 260 - High_Type_Attribute = 261 - Low_Type_Attribute = 262 - Ascending_Type_Attribute = 263 - Image_Attribute = 264 - Value_Attribute = 265 - Pos_Attribute = 266 - Val_Attribute = 267 - Succ_Attribute = 268 - Pred_Attribute = 269 - Leftof_Attribute = 270 - Rightof_Attribute = 271 - Signal_Slew_Attribute = 272 - Quantity_Slew_Attribute = 273 - Ramp_Attribute = 274 - Zoh_Attribute = 275 - Ltf_Attribute = 276 - Ztf_Attribute = 277 - Dot_Attribute = 278 - Integ_Attribute = 279 - Above_Attribute = 280 - Quantity_Delayed_Attribute = 281 - Delayed_Attribute = 282 - Stable_Attribute = 283 - Quiet_Attribute = 284 - Transaction_Attribute = 285 - Event_Attribute = 286 - Active_Attribute = 287 - Last_Event_Attribute = 288 - Last_Active_Attribute = 289 - Last_Value_Attribute = 290 - Driving_Attribute = 291 - Driving_Value_Attribute = 292 - Behavior_Attribute = 293 - Structure_Attribute = 294 - Simple_Name_Attribute = 295 - Instance_Name_Attribute = 296 - Path_Name_Attribute = 297 - Left_Array_Attribute = 298 - Right_Array_Attribute = 299 - High_Array_Attribute = 300 - Low_Array_Attribute = 301 - Length_Array_Attribute = 302 - Ascending_Array_Attribute = 303 - Range_Array_Attribute = 304 - Reverse_Range_Array_Attribute = 305 - Attribute_Name = 306 + Psl_Prev = 193 + Psl_Stable = 194 + Psl_Rose = 195 + Psl_Fell = 196 + Psl_Expression = 197 + Sensitized_Process_Statement = 198 + Process_Statement = 199 + Concurrent_Simple_Signal_Assignment = 200 + Concurrent_Conditional_Signal_Assignment = 201 + Concurrent_Selected_Signal_Assignment = 202 + Concurrent_Assertion_Statement = 203 + Concurrent_Procedure_Call_Statement = 204 + Concurrent_Break_Statement = 205 + Psl_Assert_Directive = 206 + Psl_Assume_Directive = 207 + Psl_Cover_Directive = 208 + Psl_Restrict_Directive = 209 + Block_Statement = 210 + If_Generate_Statement = 211 + Case_Generate_Statement = 212 + For_Generate_Statement = 213 + Component_Instantiation_Statement = 214 + Psl_Default_Clock = 215 + Generate_Statement_Body = 216 + If_Generate_Else_Clause = 217 + Simple_Simultaneous_Statement = 218 + Simultaneous_Null_Statement = 219 + Simultaneous_Procedural_Statement = 220 + Simultaneous_Case_Statement = 221 + Simultaneous_If_Statement = 222 + Simultaneous_Elsif = 223 + Simple_Signal_Assignment_Statement = 224 + Conditional_Signal_Assignment_Statement = 225 + Selected_Waveform_Assignment_Statement = 226 + Null_Statement = 227 + Assertion_Statement = 228 + Report_Statement = 229 + Wait_Statement = 230 + Variable_Assignment_Statement = 231 + Conditional_Variable_Assignment_Statement = 232 + Return_Statement = 233 + For_Loop_Statement = 234 + While_Loop_Statement = 235 + Next_Statement = 236 + Exit_Statement = 237 + Case_Statement = 238 + Procedure_Call_Statement = 239 + Break_Statement = 240 + If_Statement = 241 + Elsif = 242 + Character_Literal = 243 + Simple_Name = 244 + Selected_Name = 245 + Operator_Symbol = 246 + Reference_Name = 247 + External_Constant_Name = 248 + External_Signal_Name = 249 + External_Variable_Name = 250 + Selected_By_All_Name = 251 + Parenthesis_Name = 252 + Package_Pathname = 253 + Absolute_Pathname = 254 + Relative_Pathname = 255 + Pathname_Element = 256 + Base_Attribute = 257 + Subtype_Attribute = 258 + Element_Attribute = 259 + Across_Attribute = 260 + Through_Attribute = 261 + Nature_Reference_Attribute = 262 + Left_Type_Attribute = 263 + Right_Type_Attribute = 264 + High_Type_Attribute = 265 + Low_Type_Attribute = 266 + Ascending_Type_Attribute = 267 + Image_Attribute = 268 + Value_Attribute = 269 + Pos_Attribute = 270 + Val_Attribute = 271 + Succ_Attribute = 272 + Pred_Attribute = 273 + Leftof_Attribute = 274 + Rightof_Attribute = 275 + Signal_Slew_Attribute = 276 + Quantity_Slew_Attribute = 277 + Ramp_Attribute = 278 + Zoh_Attribute = 279 + Ltf_Attribute = 280 + Ztf_Attribute = 281 + Dot_Attribute = 282 + Integ_Attribute = 283 + Above_Attribute = 284 + Quantity_Delayed_Attribute = 285 + Delayed_Attribute = 286 + Stable_Attribute = 287 + Quiet_Attribute = 288 + Transaction_Attribute = 289 + Event_Attribute = 290 + Active_Attribute = 291 + Last_Event_Attribute = 292 + Last_Active_Attribute = 293 + Last_Value_Attribute = 294 + Driving_Attribute = 295 + Driving_Value_Attribute = 296 + Behavior_Attribute = 297 + Structure_Attribute = 298 + Simple_Name_Attribute = 299 + Instance_Name_Attribute = 300 + Path_Name_Attribute = 301 + Left_Array_Attribute = 302 + Right_Array_Attribute = 303 + High_Array_Attribute = 304 + Low_Array_Attribute = 305 + Length_Array_Attribute = 306 + Ascending_Array_Attribute = 307 + Range_Array_Attribute = 308 + Reverse_Range_Array_Attribute = 309 + Attribute_Name = 310 class Iir_Kinds: @@ -450,6 +454,10 @@ class Iir_Kinds: Iir_Kind.External_Signal_Name, Iir_Kind.External_Variable_Name] + Dereference = [ + Iir_Kind.Dereference, + Iir_Kind.Implicit_Dereference] + Primary_Unit = [ Iir_Kind.Entity_Declaration, Iir_Kind.Configuration_Declaration, @@ -482,9 +490,11 @@ class Iir_Kinds: Iir_Kind.Package_Declaration, Iir_Kind.Package_Instantiation_Declaration] - Dereference = [ - Iir_Kind.Dereference, - Iir_Kind.Implicit_Dereference] + Psl_Builtin = [ + Iir_Kind.Psl_Prev, + Iir_Kind.Psl_Stable, + Iir_Kind.Psl_Rose, + Iir_Kind.Psl_Fell] Composite_Subtype_Definition = [ Iir_Kind.Array_Subtype_Definition, @@ -2986,3 +2996,15 @@ Set_PSL_Clock_Sensitivity = libghdl.vhdl__nodes__set_psl_clock_sensitivity Get_PSL_EOS_Flag = libghdl.vhdl__nodes__get_psl_eos_flag Set_PSL_EOS_Flag = libghdl.vhdl__nodes__set_psl_eos_flag + +Get_Count_Expression = libghdl.vhdl__nodes__get_count_expression + +Set_Count_Expression = libghdl.vhdl__nodes__set_count_expression + +Get_Clock_Expression = libghdl.vhdl__nodes__get_clock_expression + +Set_Clock_Expression = libghdl.vhdl__nodes__set_clock_expression + +Get_Clock = libghdl.vhdl__nodes__get_clock + +Set_Clock = libghdl.vhdl__nodes__set_clock diff --git a/python/libghdl/thin/vhdl/nodes_meta.py b/python/libghdl/thin/vhdl/nodes_meta.py index e2a9d7eb0..83af5ee91 100644 --- a/python/libghdl/thin/vhdl/nodes_meta.py +++ b/python/libghdl/thin/vhdl/nodes_meta.py @@ -422,6 +422,9 @@ class fields: PSL_Nbr_States = 357 PSL_Clock_Sensitivity = 358 PSL_EOS_Flag = 359 + Count_Expression = 360 + Clock_Expression = 361 + Clock = 362 Get_Boolean = libghdl.vhdl__nodes_meta__get_boolean @@ -1568,3 +1571,12 @@ Has_PSL_Clock_Sensitivity =\ Has_PSL_EOS_Flag =\ libghdl.vhdl__nodes_meta__has_psl_eos_flag + +Has_Count_Expression =\ + libghdl.vhdl__nodes_meta__has_count_expression + +Has_Clock_Expression =\ + libghdl.vhdl__nodes_meta__has_clock_expression + +Has_Clock =\ + libghdl.vhdl__nodes_meta__has_clock diff --git a/python/libghdl/thin/vhdl/tokens.py b/python/libghdl/thin/vhdl/tokens.py index db2741d34..819f805ff 100644 --- a/python/libghdl/thin/vhdl/tokens.py +++ b/python/libghdl/thin/vhdl/tokens.py @@ -213,3 +213,7 @@ class Tok: Until_Em = 209 Until_Un = 210 Until_Em_Un = 211 + Prev = 212 + Stable = 213 + Fell = 214 + Rose = 215 diff --git a/src/ghdldrv/ghdlprint.adb b/src/ghdldrv/ghdlprint.adb index 58186948c..38c70699a 100644 --- a/src/ghdldrv/ghdlprint.adb +++ b/src/ghdldrv/ghdlprint.adb @@ -391,38 +391,42 @@ package body Ghdlprint is when Tok_Across .. Tok_Tolerance => Disp_Reserved; when Tok_Psl_Clock - | Tok_Psl_Endpoint - | Tok_Psl_Boolean - | Tok_Psl_Const - | Tok_Inf - | Tok_Within - | Tok_Abort - | Tok_Before - | Tok_Before_Em - | Tok_Before_Un - | Tok_Before_Em_Un - | Tok_Until_Em - | Tok_Until_Un - | Tok_Until_Em_Un - | Tok_Always - | Tok_Never - | Tok_Eventually_Em - | Tok_Next_Em - | Tok_Next_A - | Tok_Next_A_Em - | Tok_Next_E - | Tok_Next_E_Em - | Tok_Next_Event - | Tok_Next_Event_Em - | Tok_Next_Event_A - | Tok_Next_Event_A_Em - | Tok_Next_Event_E_Em - | Tok_Next_Event_E => + | Tok_Psl_Endpoint + | Tok_Psl_Boolean + | Tok_Psl_Const + | Tok_Inf + | Tok_Within + | Tok_Abort + | Tok_Before + | Tok_Before_Em + | Tok_Before_Un + | Tok_Before_Em_Un + | Tok_Until_Em + | Tok_Until_Un + | Tok_Until_Em_Un + | Tok_Always + | Tok_Never + | Tok_Eventually_Em + | Tok_Next_Em + | Tok_Next_A + | Tok_Next_A_Em + | Tok_Next_E + | Tok_Next_E_Em + | Tok_Next_Event + | Tok_Next_Event_Em + | Tok_Next_Event_A + | Tok_Next_Event_A_Em + | Tok_Next_Event_E_Em + | Tok_Next_Event_E + | Tok_Prev + | Tok_Stable + | Tok_Rose + | Tok_Fell => Disp_Spaces; Disp_Text; when Tok_String - | Tok_Bit_String - | Tok_Character => + | Tok_Bit_String + | Tok_Character => Disp_Spaces; case Html_Format is when Html_2 => diff --git a/src/vhdl/vhdl-elocations.adb b/src/vhdl/vhdl-elocations.adb index c4cab3475..35689c11a 100644 --- a/src/vhdl/vhdl-elocations.adb +++ b/src/vhdl/vhdl-elocations.adb @@ -350,6 +350,10 @@ package body Vhdl.Elocations is | Iir_Kind_Implicit_Dereference | Iir_Kind_Slice_Name | Iir_Kind_Indexed_Name + | Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell | Iir_Kind_Psl_Expression | Iir_Kind_Concurrent_Assertion_Statement | Iir_Kind_Concurrent_Procedure_Call_Statement diff --git a/src/vhdl/vhdl-elocations.ads b/src/vhdl/vhdl-elocations.ads index 696186b1a..700a3d7ca 100644 --- a/src/vhdl/vhdl-elocations.ads +++ b/src/vhdl/vhdl-elocations.ads @@ -111,6 +111,10 @@ package Vhdl.Elocations is -- Iir_Kind_Attribute_Value (None) -- Iir_Kind_Psl_Expression (None) + -- Iir_Kind_Psl_Prev (None) + -- Iir_Kind_Psl_Stable (None) + -- Iir_Kind_Psl_Rose (None) + -- Iir_Kind_Psl_Fell (None) -- Iir_Kind_Signature (None) diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb index dfae1afe8..4e693e932 100644 --- a/src/vhdl/vhdl-errors.adb +++ b/src/vhdl/vhdl-errors.adb @@ -782,6 +782,14 @@ package body Vhdl.Errors is return "PSL restrict"; when Iir_Kind_Psl_Default_Clock => return "PSL default clock"; + when Iir_Kind_Psl_Prev => + return "PSL prev function"; + when Iir_Kind_Psl_Stable => + return "PSL stable function"; + when Iir_Kind_Psl_Rose => + return "PSL rose function"; + when Iir_Kind_Psl_Fell => + return "PSL fell function"; when Iir_Kind_If_Statement => return Disp_Label (Node, "if statement"); diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index b25ed90a4..c28146a4e 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1132,6 +1132,10 @@ package body Vhdl.Nodes is | Iir_Kind_Implicit_Dereference | Iir_Kind_Slice_Name | Iir_Kind_Indexed_Name + | Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell | Iir_Kind_Psl_Expression | Iir_Kind_Concurrent_Assertion_Statement | Iir_Kind_Concurrent_Procedure_Call_Statement @@ -7180,4 +7184,52 @@ package body Vhdl.Nodes is Set_Flag1 (N, Flag); end Set_PSL_EOS_Flag; + function Get_Count_Expression (N : Iir) return Iir is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Count_Expression (Get_Kind (N)), + "no field Count_Expression"); + return Get_Field2 (N); + end Get_Count_Expression; + + procedure Set_Count_Expression (N : Iir; Count : Iir) is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Count_Expression (Get_Kind (N)), + "no field Count_Expression"); + Set_Field2 (N, Count); + end Set_Count_Expression; + + function Get_Clock_Expression (N : Iir) return Iir is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Clock_Expression (Get_Kind (N)), + "no field Clock_Expression"); + return Get_Field4 (N); + end Get_Clock_Expression; + + procedure Set_Clock_Expression (N : Iir; Clk : Iir) is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Clock_Expression (Get_Kind (N)), + "no field Clock_Expression"); + Set_Field4 (N, Clk); + end Set_Clock_Expression; + + function Get_Clock (N : Iir) return Iir is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Clock (Get_Kind (N)), + "no field Clock"); + return Get_Field3 (N); + end Get_Clock; + + procedure Set_Clock (N : Iir; Clk : Iir) is + begin + pragma Assert (N /= Null_Iir); + pragma Assert (Has_Clock (Get_Kind (N)), + "no field Clock"); + Set_Field3 (N, Clk); + end Set_Clock; + end Vhdl.Nodes; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 8f3c003fa..0965b5388 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -846,6 +846,32 @@ package Vhdl.Nodes is -- -- Get/Set_Psl_Expression (Field3) + -- Iir_Kind_Psl_Prev (Short) + -- + -- Get/Set_Type (Field1) + -- + -- Get/Set_Expression (Field5) + -- + -- Get/Set_Count_Expression (Field2) + -- + -- Get/Set_Clock_Expression (Field4) + -- + -- Reference to the clock node (can be the default one). + -- Get/Set_Clock (Field3) + + -- Iir_Kind_Psl_Stable (Short) + -- Iir_Kind_Psl_Rose (Short) + -- Iir_Kind_Psl_Fell (Short) + -- + -- Get/Set_Type (Field1) + -- + -- Get/Set_Expression (Field5) + -- + -- Get/Set_Clock_Expression (Field4) + -- + -- Reference to the clock node (can be the default one). + -- Get/Set_Clock (Field3) + -- Iir_Kind_Signature (Medium) -- -- LRM08 4.5.3 Signatures @@ -4923,6 +4949,10 @@ package Vhdl.Nodes is Iir_Kind_Implicit_Dereference, Iir_Kind_Slice_Name, Iir_Kind_Indexed_Name, + Iir_Kind_Psl_Prev, + Iir_Kind_Psl_Stable, + Iir_Kind_Psl_Rose, + Iir_Kind_Psl_Fell, Iir_Kind_Psl_Expression, -- Concurrent statements. @@ -6306,6 +6336,12 @@ package Vhdl.Nodes is --Iir_Kind_Remainder_Operator Iir_Kind_Exponentiation_Operator; + subtype Iir_Kinds_Psl_Builtin is Iir_Kind range + Iir_Kind_Psl_Prev .. + --Iir_Kind_Psl_Stable + --Iir_Kind_Psl_Rose + Iir_Kind_Psl_Fell; + subtype Iir_Kinds_Functions_And_Literals is Iir_Kind range Iir_Kind_Enumeration_Literal .. Iir_Kind_Function_Declaration; @@ -8948,4 +8984,16 @@ package Vhdl.Nodes is function Get_PSL_EOS_Flag (N : Iir) return Boolean; procedure Set_PSL_EOS_Flag (N : Iir; Flag : Boolean); + -- Field: Field2 + function Get_Count_Expression (N : Iir) return Iir; + procedure Set_Count_Expression (N : Iir; Count : Iir); + + -- Field: Field4 + function Get_Clock_Expression (N : Iir) return Iir; + procedure Set_Clock_Expression (N : Iir; Clk : Iir); + + -- Reference to the clock node (can be the default one). + -- Field: Field3 Ref + function Get_Clock (N : Iir) return Iir; + procedure Set_Clock (N : Iir; Clk : Iir); end Vhdl.Nodes; diff --git a/src/vhdl/vhdl-nodes_meta.adb b/src/vhdl/vhdl-nodes_meta.adb index a105ad5fc..086ce4c78 100644 --- a/src/vhdl/vhdl-nodes_meta.adb +++ b/src/vhdl/vhdl-nodes_meta.adb @@ -378,7 +378,10 @@ package body Vhdl.Nodes_Meta is Field_PSL_NFA => Type_PSL_NFA, Field_PSL_Nbr_States => Type_Int32, Field_PSL_Clock_Sensitivity => Type_Iir_List, - Field_PSL_EOS_Flag => Type_Boolean + Field_PSL_EOS_Flag => Type_Boolean, + Field_Count_Expression => Type_Iir, + Field_Clock_Expression => Type_Iir, + Field_Clock => Type_Iir ); function Get_Field_Type (F : Fields_Enum) return Types_Enum is @@ -1109,6 +1112,12 @@ package body Vhdl.Nodes_Meta is return "psl_clock_sensitivity"; when Field_PSL_EOS_Flag => return "psl_eos_flag"; + when Field_Count_Expression => + return "count_expression"; + when Field_Clock_Expression => + return "clock_expression"; + when Field_Clock => + return "clock"; end case; end Get_Field_Image; @@ -1501,6 +1510,14 @@ package body Vhdl.Nodes_Meta is return "slice_name"; when Iir_Kind_Indexed_Name => return "indexed_name"; + when Iir_Kind_Psl_Prev => + return "psl_prev"; + when Iir_Kind_Psl_Stable => + return "psl_stable"; + when Iir_Kind_Psl_Rose => + return "psl_rose"; + when Iir_Kind_Psl_Fell => + return "psl_fell"; when Iir_Kind_Psl_Expression => return "psl_expression"; when Iir_Kind_Sensitized_Process_Statement => @@ -2455,6 +2472,12 @@ package body Vhdl.Nodes_Meta is return Attr_None; when Field_PSL_EOS_Flag => return Attr_None; + when Field_Count_Expression => + return Attr_None; + when Field_Clock_Expression => + return Attr_None; + when Field_Clock => + return Attr_Ref; end case; end Get_Field_Attribute; @@ -4119,6 +4142,27 @@ package body Vhdl.Nodes_Meta is Field_Type, Field_Index_List, Field_Base_Name, + -- Iir_Kind_Psl_Prev + Field_Type, + Field_Expression, + Field_Count_Expression, + Field_Clock_Expression, + Field_Clock, + -- Iir_Kind_Psl_Stable + Field_Type, + Field_Expression, + Field_Clock_Expression, + Field_Clock, + -- Iir_Kind_Psl_Rose + Field_Type, + Field_Expression, + Field_Clock_Expression, + Field_Clock, + -- Iir_Kind_Psl_Fell + Field_Type, + Field_Expression, + Field_Clock_Expression, + Field_Clock, -- Iir_Kind_Psl_Expression Field_Psl_Expression, Field_Type, @@ -5264,120 +5308,124 @@ package body Vhdl.Nodes_Meta is Iir_Kind_Implicit_Dereference => 1452, Iir_Kind_Slice_Name => 1459, Iir_Kind_Indexed_Name => 1465, - Iir_Kind_Psl_Expression => 1467, - Iir_Kind_Sensitized_Process_Statement => 1488, - Iir_Kind_Process_Statement => 1508, - Iir_Kind_Concurrent_Simple_Signal_Assignment => 1521, - Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1534, - Iir_Kind_Concurrent_Selected_Signal_Assignment => 1548, - Iir_Kind_Concurrent_Assertion_Statement => 1556, - Iir_Kind_Concurrent_Procedure_Call_Statement => 1563, - Iir_Kind_Concurrent_Break_Statement => 1571, - Iir_Kind_Psl_Assert_Directive => 1584, - Iir_Kind_Psl_Assume_Directive => 1595, - Iir_Kind_Psl_Cover_Directive => 1607, - Iir_Kind_Psl_Restrict_Directive => 1618, - Iir_Kind_Block_Statement => 1632, - Iir_Kind_If_Generate_Statement => 1643, - Iir_Kind_Case_Generate_Statement => 1652, - Iir_Kind_For_Generate_Statement => 1661, - Iir_Kind_Component_Instantiation_Statement => 1672, - Iir_Kind_Psl_Default_Clock => 1676, - Iir_Kind_Generate_Statement_Body => 1687, - Iir_Kind_If_Generate_Else_Clause => 1693, - Iir_Kind_Simple_Simultaneous_Statement => 1700, - Iir_Kind_Simultaneous_Null_Statement => 1704, - Iir_Kind_Simultaneous_Procedural_Statement => 1715, - Iir_Kind_Simultaneous_Case_Statement => 1724, - Iir_Kind_Simultaneous_If_Statement => 1733, - Iir_Kind_Simultaneous_Elsif => 1739, - Iir_Kind_Simple_Signal_Assignment_Statement => 1750, - Iir_Kind_Conditional_Signal_Assignment_Statement => 1761, - Iir_Kind_Selected_Waveform_Assignment_Statement => 1773, - Iir_Kind_Null_Statement => 1777, - Iir_Kind_Assertion_Statement => 1784, - Iir_Kind_Report_Statement => 1790, - Iir_Kind_Wait_Statement => 1798, - Iir_Kind_Variable_Assignment_Statement => 1805, - Iir_Kind_Conditional_Variable_Assignment_Statement => 1812, - Iir_Kind_Return_Statement => 1818, - Iir_Kind_For_Loop_Statement => 1829, - Iir_Kind_While_Loop_Statement => 1840, - Iir_Kind_Next_Statement => 1847, - Iir_Kind_Exit_Statement => 1854, - Iir_Kind_Case_Statement => 1862, - Iir_Kind_Procedure_Call_Statement => 1868, - Iir_Kind_Break_Statement => 1875, - Iir_Kind_If_Statement => 1885, - Iir_Kind_Elsif => 1891, - Iir_Kind_Character_Literal => 1899, - Iir_Kind_Simple_Name => 1907, - Iir_Kind_Selected_Name => 1916, - Iir_Kind_Operator_Symbol => 1922, - Iir_Kind_Reference_Name => 1927, - Iir_Kind_External_Constant_Name => 1935, - Iir_Kind_External_Signal_Name => 1943, - Iir_Kind_External_Variable_Name => 1952, - Iir_Kind_Selected_By_All_Name => 1958, - Iir_Kind_Parenthesis_Name => 1963, - Iir_Kind_Package_Pathname => 1967, - Iir_Kind_Absolute_Pathname => 1968, - Iir_Kind_Relative_Pathname => 1969, - Iir_Kind_Pathname_Element => 1974, - Iir_Kind_Base_Attribute => 1976, - Iir_Kind_Subtype_Attribute => 1981, - Iir_Kind_Element_Attribute => 1986, - Iir_Kind_Across_Attribute => 1991, - Iir_Kind_Through_Attribute => 1996, - Iir_Kind_Nature_Reference_Attribute => 2000, - Iir_Kind_Left_Type_Attribute => 2005, - Iir_Kind_Right_Type_Attribute => 2010, - Iir_Kind_High_Type_Attribute => 2015, - Iir_Kind_Low_Type_Attribute => 2020, - Iir_Kind_Ascending_Type_Attribute => 2025, - Iir_Kind_Image_Attribute => 2031, - Iir_Kind_Value_Attribute => 2037, - Iir_Kind_Pos_Attribute => 2043, - Iir_Kind_Val_Attribute => 2049, - Iir_Kind_Succ_Attribute => 2055, - Iir_Kind_Pred_Attribute => 2061, - Iir_Kind_Leftof_Attribute => 2067, - Iir_Kind_Rightof_Attribute => 2073, - Iir_Kind_Signal_Slew_Attribute => 2081, - Iir_Kind_Quantity_Slew_Attribute => 2089, - Iir_Kind_Ramp_Attribute => 2097, - Iir_Kind_Zoh_Attribute => 2105, - Iir_Kind_Ltf_Attribute => 2113, - Iir_Kind_Ztf_Attribute => 2123, - Iir_Kind_Dot_Attribute => 2130, - Iir_Kind_Integ_Attribute => 2137, - Iir_Kind_Above_Attribute => 2145, - Iir_Kind_Quantity_Delayed_Attribute => 2153, - Iir_Kind_Delayed_Attribute => 2162, - Iir_Kind_Stable_Attribute => 2171, - Iir_Kind_Quiet_Attribute => 2180, - Iir_Kind_Transaction_Attribute => 2189, - Iir_Kind_Event_Attribute => 2193, - Iir_Kind_Active_Attribute => 2197, - Iir_Kind_Last_Event_Attribute => 2201, - Iir_Kind_Last_Active_Attribute => 2205, - Iir_Kind_Last_Value_Attribute => 2209, - Iir_Kind_Driving_Attribute => 2213, - Iir_Kind_Driving_Value_Attribute => 2217, - Iir_Kind_Behavior_Attribute => 2217, - Iir_Kind_Structure_Attribute => 2217, - Iir_Kind_Simple_Name_Attribute => 2224, - Iir_Kind_Instance_Name_Attribute => 2229, - Iir_Kind_Path_Name_Attribute => 2234, - Iir_Kind_Left_Array_Attribute => 2241, - Iir_Kind_Right_Array_Attribute => 2248, - Iir_Kind_High_Array_Attribute => 2255, - Iir_Kind_Low_Array_Attribute => 2262, - Iir_Kind_Length_Array_Attribute => 2269, - Iir_Kind_Ascending_Array_Attribute => 2276, - Iir_Kind_Range_Array_Attribute => 2283, - Iir_Kind_Reverse_Range_Array_Attribute => 2290, - Iir_Kind_Attribute_Name => 2299 + Iir_Kind_Psl_Prev => 1470, + Iir_Kind_Psl_Stable => 1474, + Iir_Kind_Psl_Rose => 1478, + Iir_Kind_Psl_Fell => 1482, + Iir_Kind_Psl_Expression => 1484, + Iir_Kind_Sensitized_Process_Statement => 1505, + Iir_Kind_Process_Statement => 1525, + Iir_Kind_Concurrent_Simple_Signal_Assignment => 1538, + Iir_Kind_Concurrent_Conditional_Signal_Assignment => 1551, + Iir_Kind_Concurrent_Selected_Signal_Assignment => 1565, + Iir_Kind_Concurrent_Assertion_Statement => 1573, + Iir_Kind_Concurrent_Procedure_Call_Statement => 1580, + Iir_Kind_Concurrent_Break_Statement => 1588, + Iir_Kind_Psl_Assert_Directive => 1601, + Iir_Kind_Psl_Assume_Directive => 1612, + Iir_Kind_Psl_Cover_Directive => 1624, + Iir_Kind_Psl_Restrict_Directive => 1635, + Iir_Kind_Block_Statement => 1649, + Iir_Kind_If_Generate_Statement => 1660, + Iir_Kind_Case_Generate_Statement => 1669, + Iir_Kind_For_Generate_Statement => 1678, + Iir_Kind_Component_Instantiation_Statement => 1689, + Iir_Kind_Psl_Default_Clock => 1693, + Iir_Kind_Generate_Statement_Body => 1704, + Iir_Kind_If_Generate_Else_Clause => 1710, + Iir_Kind_Simple_Simultaneous_Statement => 1717, + Iir_Kind_Simultaneous_Null_Statement => 1721, + Iir_Kind_Simultaneous_Procedural_Statement => 1732, + Iir_Kind_Simultaneous_Case_Statement => 1741, + Iir_Kind_Simultaneous_If_Statement => 1750, + Iir_Kind_Simultaneous_Elsif => 1756, + Iir_Kind_Simple_Signal_Assignment_Statement => 1767, + Iir_Kind_Conditional_Signal_Assignment_Statement => 1778, + Iir_Kind_Selected_Waveform_Assignment_Statement => 1790, + Iir_Kind_Null_Statement => 1794, + Iir_Kind_Assertion_Statement => 1801, + Iir_Kind_Report_Statement => 1807, + Iir_Kind_Wait_Statement => 1815, + Iir_Kind_Variable_Assignment_Statement => 1822, + Iir_Kind_Conditional_Variable_Assignment_Statement => 1829, + Iir_Kind_Return_Statement => 1835, + Iir_Kind_For_Loop_Statement => 1846, + Iir_Kind_While_Loop_Statement => 1857, + Iir_Kind_Next_Statement => 1864, + Iir_Kind_Exit_Statement => 1871, + Iir_Kind_Case_Statement => 1879, + Iir_Kind_Procedure_Call_Statement => 1885, + Iir_Kind_Break_Statement => 1892, + Iir_Kind_If_Statement => 1902, + Iir_Kind_Elsif => 1908, + Iir_Kind_Character_Literal => 1916, + Iir_Kind_Simple_Name => 1924, + Iir_Kind_Selected_Name => 1933, + Iir_Kind_Operator_Symbol => 1939, + Iir_Kind_Reference_Name => 1944, + Iir_Kind_External_Constant_Name => 1952, + Iir_Kind_External_Signal_Name => 1960, + Iir_Kind_External_Variable_Name => 1969, + Iir_Kind_Selected_By_All_Name => 1975, + Iir_Kind_Parenthesis_Name => 1980, + Iir_Kind_Package_Pathname => 1984, + Iir_Kind_Absolute_Pathname => 1985, + Iir_Kind_Relative_Pathname => 1986, + Iir_Kind_Pathname_Element => 1991, + Iir_Kind_Base_Attribute => 1993, + Iir_Kind_Subtype_Attribute => 1998, + Iir_Kind_Element_Attribute => 2003, + Iir_Kind_Across_Attribute => 2008, + Iir_Kind_Through_Attribute => 2013, + Iir_Kind_Nature_Reference_Attribute => 2017, + Iir_Kind_Left_Type_Attribute => 2022, + Iir_Kind_Right_Type_Attribute => 2027, + Iir_Kind_High_Type_Attribute => 2032, + Iir_Kind_Low_Type_Attribute => 2037, + Iir_Kind_Ascending_Type_Attribute => 2042, + Iir_Kind_Image_Attribute => 2048, + Iir_Kind_Value_Attribute => 2054, + Iir_Kind_Pos_Attribute => 2060, + Iir_Kind_Val_Attribute => 2066, + Iir_Kind_Succ_Attribute => 2072, + Iir_Kind_Pred_Attribute => 2078, + Iir_Kind_Leftof_Attribute => 2084, + Iir_Kind_Rightof_Attribute => 2090, + Iir_Kind_Signal_Slew_Attribute => 2098, + Iir_Kind_Quantity_Slew_Attribute => 2106, + Iir_Kind_Ramp_Attribute => 2114, + Iir_Kind_Zoh_Attribute => 2122, + Iir_Kind_Ltf_Attribute => 2130, + Iir_Kind_Ztf_Attribute => 2140, + Iir_Kind_Dot_Attribute => 2147, + Iir_Kind_Integ_Attribute => 2154, + Iir_Kind_Above_Attribute => 2162, + Iir_Kind_Quantity_Delayed_Attribute => 2170, + Iir_Kind_Delayed_Attribute => 2179, + Iir_Kind_Stable_Attribute => 2188, + Iir_Kind_Quiet_Attribute => 2197, + Iir_Kind_Transaction_Attribute => 2206, + Iir_Kind_Event_Attribute => 2210, + Iir_Kind_Active_Attribute => 2214, + Iir_Kind_Last_Event_Attribute => 2218, + Iir_Kind_Last_Active_Attribute => 2222, + Iir_Kind_Last_Value_Attribute => 2226, + Iir_Kind_Driving_Attribute => 2230, + Iir_Kind_Driving_Value_Attribute => 2234, + Iir_Kind_Behavior_Attribute => 2234, + Iir_Kind_Structure_Attribute => 2234, + Iir_Kind_Simple_Name_Attribute => 2241, + Iir_Kind_Instance_Name_Attribute => 2246, + Iir_Kind_Path_Name_Attribute => 2251, + Iir_Kind_Left_Array_Attribute => 2258, + Iir_Kind_Right_Array_Attribute => 2265, + Iir_Kind_High_Array_Attribute => 2272, + Iir_Kind_Low_Array_Attribute => 2279, + Iir_Kind_Length_Array_Attribute => 2286, + Iir_Kind_Ascending_Array_Attribute => 2293, + Iir_Kind_Range_Array_Attribute => 2300, + Iir_Kind_Reverse_Range_Array_Attribute => 2307, + Iir_Kind_Attribute_Name => 2316 ); function Get_Fields_First (K : Iir_Kind) return Fields_Index is @@ -6254,6 +6302,12 @@ package body Vhdl.Nodes_Meta is return Get_Protected_Type_Body (N); when Field_Protected_Type_Declaration => return Get_Protected_Type_Declaration (N); + when Field_Count_Expression => + return Get_Count_Expression (N); + when Field_Clock_Expression => + return Get_Clock_Expression (N); + when Field_Clock => + return Get_Clock (N); when others => raise Internal_Error; end case; @@ -6702,6 +6756,12 @@ package body Vhdl.Nodes_Meta is Set_Protected_Type_Body (N, V); when Field_Protected_Type_Declaration => Set_Protected_Type_Declaration (N, V); + when Field_Count_Expression => + Set_Count_Expression (N, V); + when Field_Clock_Expression => + Set_Clock_Expression (N, V); + when Field_Clock => + Set_Clock (N, V); when others => raise Internal_Error; end case; @@ -8433,6 +8493,10 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Implicit_Dereference | Iir_Kind_Slice_Name | Iir_Kind_Indexed_Name + | Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell | Iir_Kind_Psl_Expression | Iir_Kind_Return_Statement | Iir_Kind_Character_Literal @@ -10319,6 +10383,10 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Qualified_Expression | Iir_Kind_Type_Conversion | Iir_Kind_Allocator_By_Expression + | Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell | Iir_Kind_Concurrent_Selected_Signal_Assignment | Iir_Kind_Case_Generate_Statement | Iir_Kind_Simultaneous_Case_Statement @@ -12289,4 +12357,35 @@ package body Vhdl.Nodes_Meta is end case; end Has_PSL_EOS_Flag; + function Has_Count_Expression (K : Iir_Kind) return Boolean is + begin + return K = Iir_Kind_Psl_Prev; + end Has_Count_Expression; + + function Has_Clock_Expression (K : Iir_Kind) return Boolean is + begin + case K is + when Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell => + return True; + when others => + return False; + end case; + end Has_Clock_Expression; + + function Has_Clock (K : Iir_Kind) return Boolean is + begin + case K is + when Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell => + return True; + when others => + return False; + end case; + end Has_Clock; + end Vhdl.Nodes_Meta; diff --git a/src/vhdl/vhdl-nodes_meta.ads b/src/vhdl/vhdl-nodes_meta.ads index bb0b4e102..25673bf8e 100644 --- a/src/vhdl/vhdl-nodes_meta.ads +++ b/src/vhdl/vhdl-nodes_meta.ads @@ -421,7 +421,10 @@ package Vhdl.Nodes_Meta is Field_PSL_NFA, Field_PSL_Nbr_States, Field_PSL_Clock_Sensitivity, - Field_PSL_EOS_Flag + Field_PSL_EOS_Flag, + Field_Count_Expression, + Field_Clock_Expression, + Field_Clock ); pragma Discard_Names (Fields_Enum); @@ -994,4 +997,7 @@ package Vhdl.Nodes_Meta is function Has_PSL_Nbr_States (K : Iir_Kind) return Boolean; function Has_PSL_Clock_Sensitivity (K : Iir_Kind) return Boolean; function Has_PSL_EOS_Flag (K : Iir_Kind) return Boolean; + function Has_Count_Expression (K : Iir_Kind) return Boolean; + function Has_Clock_Expression (K : Iir_Kind) return Boolean; + function Has_Clock (K : Iir_Kind) return Boolean; end Vhdl.Nodes_Meta; diff --git a/src/vhdl/vhdl-parse.adb b/src/vhdl/vhdl-parse.adb index f909aac81..686e2a892 100644 --- a/src/vhdl/vhdl-parse.adb +++ b/src/vhdl/vhdl-parse.adb @@ -972,12 +972,15 @@ package body Vhdl.Parse is Res : Iir; begin case Current_Token is - when Tok_Range | Tok_Identifier => + when Tok_Range + | Tok_Identifier + | Tok_Stable => + -- Tok_Stable is possible within PSL expressions. null; when Tok_Across - | Tok_Through - | Tok_Reference - | Tok_Tolerance => + | Tok_Through + | Tok_Reference + | Tok_Tolerance => -- AMS reserved words. null; when Tok_Subtype => @@ -6011,6 +6014,53 @@ package body Vhdl.Parse is return Res; end Parse_Integer_Literal; + function Parse_PSL_Builtin_Call (Kind : Iir_Kinds_Psl_Builtin) return Iir + is + Res : Iir; + Expr : Iir; + begin + Res := Create_Iir (Kind); + Set_Location (Res); + + -- Skip builtin. + Scan; + + Expect_Scan (Tok_Left_Paren); + + Set_Expression (Res, Parse_Expression); + + if Current_Token = Tok_Comma then + -- Skip ','. + Scan; + + Expr := Parse_Expression; + case Kind is + when Iir_Kind_Psl_Fell + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Stable => + Set_Clock_Expression (Res, Expr); + when Iir_Kind_Psl_Prev => + Set_Count_Expression (Res, Expr); + end case; + end if; + + if Current_Token = Tok_Comma then + -- Skip ','. + Scan; + + case Kind is + when Iir_Kind_Psl_Prev => + Set_Clock_Expression (Res, Parse_Expression); + when others => + Error_Msg_Parse ("too many parameter for PSL builtin"); + end case; + end if; + + Expect_Scan (Tok_Right_Paren); + + return Res; + end Parse_PSL_Builtin_Call; + -- precond : next token -- postcond: next token -- @@ -6166,6 +6216,15 @@ package body Vhdl.Parse is return Res; + when Tok_Prev => + return Parse_PSL_Builtin_Call (Iir_Kind_Psl_Prev); + when Tok_Stable => + return Parse_PSL_Builtin_Call (Iir_Kind_Psl_Stable); + when Tok_Rose => + return Parse_PSL_Builtin_Call (Iir_Kind_Psl_Rose); + when Tok_Fell => + return Parse_PSL_Builtin_Call (Iir_Kind_Psl_Fell); + when Tok_Minus | Tok_Plus => Error_Msg_Parse diff --git a/src/vhdl/vhdl-prints.adb b/src/vhdl/vhdl-prints.adb index b3bef235c..b8da982a5 100644 --- a/src/vhdl/vhdl-prints.adb +++ b/src/vhdl/vhdl-prints.adb @@ -2267,6 +2267,27 @@ package body Vhdl.Prints is Close_Hbox (Ctxt); end Disp_Psl_Default_Clock; + procedure Disp_Psl_Prev (Ctxt : in out Ctxt_Class; Call : Iir) + is + Expr : Iir; + begin + Disp_Token (Ctxt, Tok_Prev); + Disp_Token (Ctxt, Tok_Left_Paren); + Print (Ctxt, Get_Expression (Call)); + Expr := Get_Count_Expression (Call); + if Expr /= Null_Iir then + Disp_Token (Ctxt, Tok_Comma); + Print (Ctxt, Expr); + + Expr := Get_Clock_Expression (Call); + if Expr /= Null_Iir then + Disp_Token (Ctxt, Tok_Comma); + Print (Ctxt, Expr); + end if; + end if; + Disp_Token (Ctxt, Tok_Right_Paren); + end Disp_Psl_Prev; + procedure Disp_Psl_Declaration (Ctxt : in out Ctxt_Class; Stmt : Iir) is Decl : constant PSL_Node := Get_Psl_Declaration (Stmt); @@ -4728,6 +4749,9 @@ package body Vhdl.Prints is when Iir_Kind_Path_Name_Attribute => Disp_Name_Attribute (Ctxt, Expr, Name_Path_Name); + when Iir_Kind_Psl_Prev => + Disp_Psl_Prev (Ctxt, Expr); + when Iir_Kinds_Type_And_Subtype_Definition => Disp_Type (Ctxt, Expr); @@ -4847,7 +4871,6 @@ package body Vhdl.Prints is end loop; end Disp_Str; - function Need_Space (Tok, Prev_Tok : Token_Type) return Boolean is begin if Prev_Tok = Tok_Newline then @@ -4900,6 +4923,7 @@ package body Vhdl.Prints is or Tok in Token_Relational_Operator_Type or Tok in Token_Adding_Operator_Type or Tok in Token_Multiplying_Operator_Type + or Tok = Tok_Minus_Greater or Tok = Tok_Bar then -- Always a space before '[', ':='. diff --git a/src/vhdl/vhdl-scanner.adb b/src/vhdl/vhdl-scanner.adb index 089b19125..82ac6adc4 100644 --- a/src/vhdl/vhdl-scanner.adb +++ b/src/vhdl/vhdl-scanner.adb @@ -1262,18 +1262,20 @@ package body Vhdl.Scanner is end Scan_Psl_Keyword_Em_Un; pragma Inline (Scan_Psl_Keyword_Em_Un); - procedure Identifier_To_Token is + procedure Identifier_To_Token + is + use Std_Names; begin - if Current_Identifier in Std_Names.Name_Id_Keywords then + if Current_Identifier in Name_Id_Keywords then -- LRM93 13.9 -- The identifiers listed below are called reserved words and are -- reserved for signifiances in the language. -- IN: this is also achieved in packages std_names and tokens. Current_Token := Token_Type'Val (Token_Type'Pos (Tok_First_Keyword) - + Current_Identifier - Std_Names.Name_First_Keyword); + + Current_Identifier - Name_First_Keyword); case Current_Identifier is - when Std_Names.Name_Id_AMS_Reserved_Words => + when Name_Id_AMS_Reserved_Words => if not AMS_Vhdl then if Is_Warning_Enabled (Warnid_Reserved_Word) then Warning_Msg_Scan @@ -1283,30 +1285,38 @@ package body Vhdl.Scanner is end if; Current_Token := Tok_Identifier; end if; - when Std_Names.Name_Id_Vhdl08_Reserved_Words => + when Name_Id_Vhdl08_Reserved_Words => if Vhdl_Std < Vhdl_08 then -- Some vhdl08 reserved words are PSL keywords. if Flag_Psl then case Current_Identifier is - when Std_Names.Name_Sequence => + when Name_Prev => + Current_Token := Tok_Prev; + when Name_Stable => + Current_Token := Tok_Stable; + when Name_Rose => + Current_Token := Tok_Rose; + when Name_Fell => + Current_Token := Tok_Fell; + when Name_Sequence => Current_Token := Tok_Sequence; - when Std_Names.Name_Property => + when Name_Property => Current_Token := Tok_Property; - when Std_Names.Name_Assume => + when Name_Assume => Current_Token := Tok_Assume; - when Std_Names.Name_Cover => + when Name_Cover => Current_Token := Tok_Cover; - when Std_Names.Name_Default => + when Name_Default => Current_Token := Tok_Default; - when Std_Names.Name_Restrict => + when Name_Restrict => Current_Token := Tok_Restrict; - when Std_Names.Name_Restrict_Guarantee => + when Name_Restrict_Guarantee => Current_Token := Tok_Restrict_Guarantee; - when Std_Names.Name_Vmode => + when Name_Vmode => Current_Token := Tok_Vmode; - when Std_Names.Name_Vprop => + when Name_Vprop => Current_Token := Tok_Vprop; - when Std_Names.Name_Vunit => + when Name_Vunit => Current_Token := Tok_Vunit; when others => Current_Token := Tok_Identifier; @@ -1323,7 +1333,7 @@ package body Vhdl.Scanner is +Current_Identifier); end if; end if; - when Std_Names.Name_Id_Vhdl00_Reserved_Words => + when Name_Id_Vhdl00_Reserved_Words => if Vhdl_Std < Vhdl_00 then if Is_Warning_Enabled (Warnid_Reserved_Word) then Warning_Msg_Scan @@ -1333,7 +1343,7 @@ package body Vhdl.Scanner is end if; Current_Token := Tok_Identifier; end if; - when Std_Names.Name_Id_Vhdl93_Reserved_Words => + when Name_Id_Vhdl93_Reserved_Words => if Vhdl_Std = Vhdl_87 then if Is_Warning_Enabled (Warnid_Reserved_Word) then Report_Start_Group; @@ -1348,7 +1358,7 @@ package body Vhdl.Scanner is end if; Current_Token := Tok_Identifier; end if; - when Std_Names.Name_Id_Vhdl87_Reserved_Words => + when Name_Id_Vhdl87_Reserved_Words => if Flag_Psl then if Current_Token = Tok_Until then Scan_Psl_Keyword_Em_Un (Tok_Until, Tok_Until_Em, @@ -1362,59 +1372,67 @@ package body Vhdl.Scanner is end case; elsif Flag_Psl then case Current_Identifier is - when Std_Names.Name_Clock => + when Name_Prev => + Current_Token := Tok_Prev; + when Name_Stable => + Current_Token := Tok_Stable; + when Name_Rose => + Current_Token := Tok_Rose; + when Name_Fell => + Current_Token := Tok_Fell; + when Name_Clock => Current_Token := Tok_Psl_Clock; - when Std_Names.Name_Const => + when Name_Const => Current_Token := Tok_Psl_Const; - when Std_Names.Name_Boolean => + when Name_Boolean => Current_Token := Tok_Psl_Boolean; - when Std_Names.Name_Sequence => + when Name_Sequence => Current_Token := Tok_Sequence; - when Std_Names.Name_Property => + when Name_Property => Current_Token := Tok_Property; - when Std_Names.Name_Endpoint => + when Name_Endpoint => Current_Token := Tok_Psl_Endpoint; - when Std_Names.Name_Assume => + when Name_Assume => Current_Token := Tok_Assume; - when Std_Names.Name_Cover => + when Name_Cover => Current_Token := Tok_Cover; - when Std_Names.Name_Default => + when Name_Default => Current_Token := Tok_Default; - when Std_Names.Name_Restrict => + when Name_Restrict => Current_Token := Tok_Restrict; - when Std_Names.Name_Restrict_Guarantee => + when Name_Restrict_Guarantee => Current_Token := Tok_Restrict_Guarantee; - when Std_Names.Name_Inf => + when Name_Inf => Current_Token := Tok_Inf; - when Std_Names.Name_Within => + when Name_Within => Current_Token := Tok_Within; - when Std_Names.Name_Abort => + when Name_Abort => Current_Token := Tok_Abort; - when Std_Names.Name_Before => + when Name_Before => Scan_Psl_Keyword_Em_Un (Tok_Before, Tok_Before_Em, Tok_Before_Un, Tok_Before_Em_Un); - when Std_Names.Name_Always => + when Name_Always => Current_Token := Tok_Always; - when Std_Names.Name_Never => + when Name_Never => Current_Token := Tok_Never; - when Std_Names.Name_Eventually => + when Name_Eventually => if Source (Pos) = '!' then Pos := Pos + 1; else Error_Msg_Scan ("'!' expected after 'eventually'"); end if; Current_Token := Tok_Eventually_Em; - when Std_Names.Name_Next_A => + when Name_Next_A => Scan_Psl_Keyword_Em (Tok_Next_A, Tok_Next_A_Em); - when Std_Names.Name_Next_E => + when Name_Next_E => Scan_Psl_Keyword_Em (Tok_Next_E, Tok_Next_E_Em); - when Std_Names.Name_Next_Event => + when Name_Next_Event => Scan_Psl_Keyword_Em (Tok_Next_Event, Tok_Next_Event_Em); - when Std_Names.Name_Next_Event_A => + when Name_Next_Event_A => Scan_Psl_Keyword_Em (Tok_Next_Event_A, Tok_Next_Event_A_Em); - when Std_Names.Name_Next_Event_E => + when Name_Next_Event_E => Scan_Psl_Keyword_Em (Tok_Next_Event_E, Tok_Next_Event_E_Em); - when Std_Names.Name_Until => + when Name_Until => raise Internal_Error; when others => Current_Token := Tok_Identifier; diff --git a/src/vhdl/vhdl-tokens.adb b/src/vhdl/vhdl-tokens.adb index 7e5633f16..0242808bf 100644 --- a/src/vhdl/vhdl-tokens.adb +++ b/src/vhdl/vhdl-tokens.adb @@ -405,6 +405,7 @@ package body Vhdl.Tokens is when Tok_Tolerance => return "tolerance"; + -- PSL operators when Tok_And_And => return "&&"; when Tok_Bar_Bar => @@ -432,8 +433,17 @@ package body Vhdl.Tokens is when Tok_Arobase => return "@"; + -- PSL keywords when Tok_Psl_Clock => return "clock"; + when Tok_Fell => + return "fell"; + when Tok_Rose => + return "rose"; + when Tok_Stable => + return "stable"; + when Tok_Prev => + return "prev"; when Tok_Psl_Endpoint => return "endpoint"; when Tok_Psl_Const => diff --git a/src/vhdl/vhdl-tokens.ads b/src/vhdl/vhdl-tokens.ads index 3efc165ed..e35a3a4e4 100644 --- a/src/vhdl/vhdl-tokens.ads +++ b/src/vhdl/vhdl-tokens.ads @@ -295,7 +295,12 @@ package Vhdl.Tokens is Tok_Next_Event_E_Em, Tok_Until_Em, Tok_Until_Un, - Tok_Until_Em_Un + Tok_Until_Em_Un, + + Tok_Prev, + Tok_Stable, + Tok_Fell, + Tok_Rose ); -- To ease interfacing diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb index 261be0f4e..a7b726b79 100644 --- a/src/vhdl/vhdl-utils.adb +++ b/src/vhdl/vhdl-utils.adb @@ -292,74 +292,78 @@ package body Vhdl.Utils is when Iir_Kind_Attribute_Name => return Get_Named_Entity (Adecl); when Iir_Kind_Error - | Iir_Kind_Unused - | Iir_Kind_Parenthesis_Name - | Iir_Kind_Conditional_Expression - | Iir_Kind_Character_Literal - | Iir_Kind_Operator_Symbol - | Iir_Kind_Design_File - | Iir_Kind_Design_Unit - | Iir_Kind_Library_Clause - | Iir_Kind_Use_Clause - | Iir_Kind_Context_Reference - | Iir_Kind_Library_Declaration - | Iir_Kinds_Library_Unit - | Iir_Kind_Component_Declaration - | Iir_Kind_Function_Declaration - | Iir_Kind_Procedure_Declaration - | Iir_Kind_Attribute_Declaration - | Iir_Kind_Nature_Declaration - | Iir_Kind_Subnature_Declaration - | Iir_Kinds_Type_Declaration - | Iir_Kinds_Type_And_Subtype_Definition - | Iir_Kinds_Nature_Definition - | Iir_Kinds_Subnature_Definition - | Iir_Kind_Wildcard_Type_Definition - | Iir_Kind_Subtype_Definition - | Iir_Kind_Group_Template_Declaration - | Iir_Kind_Group_Declaration - | Iir_Kind_Anonymous_Signal_Declaration - | Iir_Kind_Signal_Attribute_Declaration - | Iir_Kind_Unaffected_Waveform - | Iir_Kind_Waveform_Element - | Iir_Kind_Conditional_Waveform - | Iir_Kind_Binding_Indication - | Iir_Kind_Component_Configuration - | Iir_Kind_Block_Configuration - | Iir_Kinds_Specification - | Iir_Kind_Non_Object_Alias_Declaration - | Iir_Kinds_Subprogram_Body - | Iir_Kind_Protected_Type_Body - | Iir_Kind_Generate_Statement_Body - | Iir_Kind_Procedure_Call - | Iir_Kind_Aggregate_Info - | Iir_Kind_Entity_Class - | Iir_Kind_Signature - | Iir_Kind_Break_Element - | Iir_Kind_Reference_Name - | Iir_Kind_Package_Header - | Iir_Kind_Block_Header - | Iir_Kinds_Association_Element - | Iir_Kinds_Choice - | Iir_Kinds_Entity_Aspect - | Iir_Kind_Psl_Hierarchical_Name - | Iir_Kind_If_Generate_Else_Clause - | Iir_Kind_Elsif - | Iir_Kind_Simultaneous_Elsif - | Iir_Kind_Record_Element_Constraint - | Iir_Kind_Array_Element_Resolution - | Iir_Kind_Record_Resolution - | Iir_Kind_Record_Element_Resolution - | Iir_Kind_Element_Declaration - | Iir_Kind_Nature_Element_Declaration - | Iir_Kind_Psl_Endpoint_Declaration - | Iir_Kind_Psl_Declaration - | Iir_Kind_Package_Pathname - | Iir_Kind_Absolute_Pathname - | Iir_Kind_Relative_Pathname - | Iir_Kind_Pathname_Element - | Iir_Kind_Range_Expression - | Iir_Kind_Overload_List => + | Iir_Kind_Unused + | Iir_Kind_Parenthesis_Name + | Iir_Kind_Conditional_Expression + | Iir_Kind_Character_Literal + | Iir_Kind_Operator_Symbol + | Iir_Kind_Design_File + | Iir_Kind_Design_Unit + | Iir_Kind_Library_Clause + | Iir_Kind_Use_Clause + | Iir_Kind_Context_Reference + | Iir_Kind_Library_Declaration + | Iir_Kinds_Library_Unit + | Iir_Kind_Component_Declaration + | Iir_Kind_Function_Declaration + | Iir_Kind_Procedure_Declaration + | Iir_Kind_Attribute_Declaration + | Iir_Kind_Nature_Declaration + | Iir_Kind_Subnature_Declaration + | Iir_Kinds_Type_Declaration + | Iir_Kinds_Type_And_Subtype_Definition + | Iir_Kinds_Nature_Definition + | Iir_Kinds_Subnature_Definition + | Iir_Kind_Wildcard_Type_Definition + | Iir_Kind_Subtype_Definition + | Iir_Kind_Group_Template_Declaration + | Iir_Kind_Group_Declaration + | Iir_Kind_Anonymous_Signal_Declaration + | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Unaffected_Waveform + | Iir_Kind_Waveform_Element + | Iir_Kind_Conditional_Waveform + | Iir_Kind_Binding_Indication + | Iir_Kind_Component_Configuration + | Iir_Kind_Block_Configuration + | Iir_Kinds_Specification + | Iir_Kind_Non_Object_Alias_Declaration + | Iir_Kinds_Subprogram_Body + | Iir_Kind_Protected_Type_Body + | Iir_Kind_Generate_Statement_Body + | Iir_Kind_Procedure_Call + | Iir_Kind_Aggregate_Info + | Iir_Kind_Entity_Class + | Iir_Kind_Signature + | Iir_Kind_Break_Element + | Iir_Kind_Reference_Name + | Iir_Kind_Package_Header + | Iir_Kind_Block_Header + | Iir_Kinds_Association_Element + | Iir_Kinds_Choice + | Iir_Kinds_Entity_Aspect + | Iir_Kind_Psl_Hierarchical_Name + | Iir_Kind_Psl_Prev + | Iir_Kind_Psl_Stable + | Iir_Kind_Psl_Rose + | Iir_Kind_Psl_Fell + | Iir_Kind_If_Generate_Else_Clause + | Iir_Kind_Elsif + | Iir_Kind_Simultaneous_Elsif + | Iir_Kind_Record_Element_Constraint + | Iir_Kind_Array_Element_Resolution + | Iir_Kind_Record_Resolution + | Iir_Kind_Record_Element_Resolution + | Iir_Kind_Element_Declaration + | Iir_Kind_Nature_Element_Declaration + | Iir_Kind_Psl_Endpoint_Declaration + | Iir_Kind_Psl_Declaration + | Iir_Kind_Package_Pathname + | Iir_Kind_Absolute_Pathname + | Iir_Kind_Relative_Pathname + | Iir_Kind_Pathname_Element + | Iir_Kind_Range_Expression + | Iir_Kind_Overload_List => return Adecl; end case; end loop; |