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-rw-r--r--src/synth/netlists.adb2
-rw-r--r--src/vhdl/translate/trans-chap8.adb2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/synth/netlists.adb b/src/synth/netlists.adb
index 24c39df50..31a3321b2 100644
--- a/src/synth/netlists.adb
+++ b/src/synth/netlists.adb
@@ -1215,6 +1215,8 @@ package body Netlists is
-- There is now at least one attribute for INST.
Instances_Table.Table (Inst).Has_Attr := True;
+ -- Get (or create and get) an entry for INST. If created, it will be
+ -- No_Attribute (returned by attribute_build_value).
Attribute_Maps.Get_Index (Module_Rec.Attrs.all, Inst, Idx);
Prev := Attribute_Maps.Get_Value (Module_Rec.Attrs.all, Idx);
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 582a526cd..4d62012f8 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -4544,10 +4544,12 @@ package body Trans.Chap8 is
Bounds : Mnode;
begin
if Get_Kind (Target) = Iir_Kind_Aggregate then
+ -- The target is an aggregate.
Chap3.Translate_Anonymous_Subtype_Definition (Target_Type, False);
Target_Tinfo := Get_Info (Target_Type);
Targ := Create_Temp (Target_Tinfo, Mode_Signal);
if Target_Tinfo.Type_Mode in Type_Mode_Unbounded then
+ -- Unbounded array, allocate bounds.
Bounds := Dv2M (Create_Temp (Target_Tinfo.B.Bounds_Type),
Target_Tinfo,
Mode_Value,