diff options
| -rw-r--r-- | testsuite/synth/issue2074/bitvec.vhdl | 16 | ||||
| -rwxr-xr-x | testsuite/synth/issue2074/testsuite.sh | 9 |
2 files changed, 25 insertions, 0 deletions
diff --git a/testsuite/synth/issue2074/bitvec.vhdl b/testsuite/synth/issue2074/bitvec.vhdl new file mode 100644 index 000000000..abd0786e3 --- /dev/null +++ b/testsuite/synth/issue2074/bitvec.vhdl @@ -0,0 +1,16 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity bitvec is +port ( + clk : in std_logic; + d : in bit_vector(7 downto 0); + q : out bit_vector(7 downto 0) +); +end entity; + +architecture rtl of bitvec is + constant a : bit_vector(7 downto 0) := X"5a"; +begin + q <= d and a; +end architecture; diff --git a/testsuite/synth/issue2074/testsuite.sh b/testsuite/synth/issue2074/testsuite.sh new file mode 100755 index 000000000..27ce42d50 --- /dev/null +++ b/testsuite/synth/issue2074/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only bitvec + +clean + +echo "Test successful" |