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authorTristan Gingold <tgingold@free.fr>2019-04-16 19:03:15 +0200
committerTristan Gingold <tgingold@free.fr>2019-04-16 19:03:15 +0200
commitc7f21ce2263a90520c0b592ebaec56cd15239866 (patch)
treeeef4c6aa191c653ea80b0b6f44e2a37a69d72d1f /testsuite
parente1f9a72eb52af14a55d884b6f33971ddfb8839c4 (diff)
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synth: add testcase for previous commit.
Diffstat (limited to 'testsuite')
-rw-r--r--testsuite/synth/dff01/dff05.vhdl24
-rwxr-xr-xtestsuite/synth/dff01/testsuite.sh1
2 files changed, 25 insertions, 0 deletions
diff --git a/testsuite/synth/dff01/dff05.vhdl b/testsuite/synth/dff01/dff05.vhdl
new file mode 100644
index 000000000..cd109a439
--- /dev/null
+++ b/testsuite/synth/dff01/dff05.vhdl
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity dff05 is
+ port (q : out std_logic_vector(7 downto 0);
+ d : std_logic_vector(7 downto 0);
+ clk : std_logic;
+ rst : std_logic;
+ en : std_logic);
+end dff05;
+
+architecture behav of dff05 is
+begin
+ process (clk) is
+ begin
+ if rst = '1' then
+ q <= x"00";
+ elsif rising_edge (clk) then
+ if en = '1' then
+ q <= d;
+ end if;
+ end if;
+ end process;
+end behav;
diff --git a/testsuite/synth/dff01/testsuite.sh b/testsuite/synth/dff01/testsuite.sh
index b8d3d335c..12c11db33 100755
--- a/testsuite/synth/dff01/testsuite.sh
+++ b/testsuite/synth/dff01/testsuite.sh
@@ -6,6 +6,7 @@ synth dff01.vhdl -e dff01
synth dff02.vhdl -e dff02
synth dff03.vhdl -e dff03
synth dff04.vhdl -e dff04
+synth dff05.vhdl -e dff05
clean