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authorTristan Gingold <tgingold@free.fr>2021-05-25 22:14:26 +0200
committerTristan Gingold <tgingold@free.fr>2021-05-26 19:00:00 +0200
commitb9c27bb75173c1999af18a6a70e37165062421f1 (patch)
treee0d51c27b8488634b0c64a6ec9ce98ccbf8c04bc /testsuite
parentbc64b96b31c0fb591c1775fffba1ada37f1914db (diff)
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testsuite/gna: add a test for #1771
Diffstat (limited to 'testsuite')
-rw-r--r--testsuite/gna/issue1771/add_carry_ghdl_testbench.vhdl88
-rw-r--r--testsuite/gna/issue1771/add_carry_testbench.ref19
-rwxr-xr-xtestsuite/gna/issue1771/testsuite.sh4
3 files changed, 111 insertions, 0 deletions
diff --git a/testsuite/gna/issue1771/add_carry_ghdl_testbench.vhdl b/testsuite/gna/issue1771/add_carry_ghdl_testbench.vhdl
new file mode 100644
index 000000000..271d872f6
--- /dev/null
+++ b/testsuite/gna/issue1771/add_carry_ghdl_testbench.vhdl
@@ -0,0 +1,88 @@
+use std.textio.all;
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_textio.all;
+use ieee.fixed_pkg.all;
+
+entity add_carry_ghdl_testbench is
+end entity add_carry_ghdl_testbench;
+
+architecture testbench of add_carry_ghdl_testbench is
+ signal sci : std_ulogic := '1';
+ signal sx_6_0 : ufixed (6 downto 0) := "1101000";
+ signal sx_3_0 : ufixed (3 downto 0) := "1101";
+ signal sy_6_0 : ufixed (6 downto 0) := "0111000";
+ signal sx_3_m3 : ufixed (3 downto -3) := "1101000";
+ signal sy_3_m3 : ufixed (3 downto -3) := "0111000";
+ signal sz_6_0 : ufixed (6 downto 0);
+ signal sz_3_m3 : ufixed (3 downto -3);
+ signal sz_3_0_m3 : ufixed (3 downto -3);
+ signal sco_6_0 : std_ulogic;
+ signal sco_3_m3 : std_ulogic;
+ signal sco_3_0_m3 : std_ulogic;
+begin
+ test_add_carry_6_0 : process is
+ variable x : ufixed (6 downto 0) := sx_6_0;
+ variable y : ufixed (6 downto 0) := sy_6_0;
+ variable z : ufixed (6 downto 0);
+ variable ci : std_ulogic := sci;
+ variable co : std_ulogic;
+ variable msg : line;
+ begin
+ add_carry (L => x, R => y, c_in => ci, result => z, c_out => co);
+ sz_6_0 <= z;
+ sco_6_0 <= co;
+ wait for 1 ns;
+ write(msg, "sci=" & to_string(sci) & CR & LF);
+ write(msg, "sx_6_0=" & to_hstring(sx_6_0) & CR & LF);
+ write(msg, "sy_6_0=" & to_hstring(sy_6_0) & CR & LF);
+ write(msg, "sz_6_0=" & to_hstring(sz_6_0) & CR & LF);
+ write(msg, "sco_6_0=" & to_string(sco_6_0) & CR & LF);
+ writeline(output,msg);
+ wait;
+ end process test_add_carry_6_0;
+
+
+ test_add_carry_3_m3 : process is
+ variable x : ufixed (3 downto -3) := sx_3_m3;
+ variable y : ufixed (3 downto -3) := sy_3_m3;
+ variable z : ufixed (3 downto -3);
+ variable ci : std_ulogic := sci;
+ variable co : std_ulogic;
+ variable msg : line;
+ begin
+ add_carry (L => x, R => y, c_in => ci, result => z, c_out => co);
+ sz_3_m3 <= z;
+ sco_3_m3 <= co;
+ wait for 2 ns;
+ write(msg, "sci=" & to_string(sci) & CR & LF);
+ write(msg, "sx_3_m3=" & to_hstring(sx_3_m3) & CR & LF);
+ write(msg, "sy_3_m3=" & to_hstring(sy_3_m3) & CR & LF);
+ write(msg, "sz_3_m3=" & to_hstring(sz_3_m3) & CR & LF);
+ write(msg, "sco_3_m3=" & to_string(sco_3_m3) & CR & LF);
+ writeline(output,msg);
+ wait;
+ end process test_add_carry_3_m3;
+
+ test_add_carry_3_0_m3 : process is
+ variable x : ufixed (3 downto 0) := sx_3_0;
+ variable y : ufixed (3 downto -3) := sy_3_m3;
+ variable z : ufixed (3 downto -3);
+ variable ci : std_ulogic := sci;
+ variable co : std_ulogic;
+ variable msg : line;
+ begin
+ add_carry (L => x, R => y, c_in => ci, result => z, c_out => co);
+ sz_3_0_m3 <= z;
+ sco_3_0_m3 <= co;
+ wait for 3 ns;
+ write(msg, "sci=" & to_string(sci) & CR & LF);
+ write(msg, "sx_3_0=" & to_hstring(sx_3_0) & CR & LF);
+ write(msg, "sy_3_m3=" & to_hstring(sy_3_m3) & CR & LF);
+ write(msg, "sz_3_0_m3=" & to_hstring(sz_3_0_m3) & CR & LF);
+ write(msg, "sco_3_0_m3=" & to_string(sco_3_0_m3) & CR & LF);
+ writeline(output,msg);
+ wait;
+ end process test_add_carry_3_0_m3;
+
+end architecture testbench;
diff --git a/testsuite/gna/issue1771/add_carry_testbench.ref b/testsuite/gna/issue1771/add_carry_testbench.ref
new file mode 100644
index 000000000..b72fd1bb3
--- /dev/null
+++ b/testsuite/gna/issue1771/add_carry_testbench.ref
@@ -0,0 +1,19 @@
+elaborate and simulate add_carry_ghdl_testbench
+sci=1
+sx_6_0=68.0
+sy_6_0=38.0
+sz_6_0=21.0
+sco_6_0=1
+
+sci=1
+sx_3_m3=D.0
+sy_3_m3=7.0
+sz_3_m3=4.2
+sco_3_m3=1
+
+sci=1
+sx_3_0=D.0
+sy_3_m3=7.0
+sz_3_0_m3=4.2
+sco_3_0_m3=1
+
diff --git a/testsuite/gna/issue1771/testsuite.sh b/testsuite/gna/issue1771/testsuite.sh
index f965617d2..0c37e3b1d 100755
--- a/testsuite/gna/issue1771/testsuite.sh
+++ b/testsuite/gna/issue1771/testsuite.sh
@@ -6,6 +6,10 @@ export GHDL_STD_FLAGS=--std=08
analyze tf.vhdl
elab_simulate tf
+analyze add_carry_ghdl_testbench.vhdl
+elab_simulate add_carry_ghdl_testbench > add_carry_testbench.out
+diff --strip-trailing-cr add_carry_testbench.ref add_carry_testbench.out
+
clean
echo "Test successful"