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author | Tristan Gingold <tgingold@free.fr> | 2020-05-16 08:10:08 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-05-16 08:17:51 +0200 |
commit | ae3c760f1a7592f1fae36fe88f13649b83cf3cff (patch) | |
tree | ae1b1e17927dff2de8090d0a04a9f177d26bec37 /testsuite | |
parent | ad87210f34671ab9454b581965a15f67eb39cdcf (diff) | |
download | ghdl-ae3c760f1a7592f1fae36fe88f13649b83cf3cff.tar.gz ghdl-ae3c760f1a7592f1fae36fe88f13649b83cf3cff.tar.bz2 ghdl-ae3c760f1a7592f1fae36fe88f13649b83cf3cff.zip |
testsuite/synth: add a test for #1313
Diffstat (limited to 'testsuite')
-rw-r--r-- | testsuite/synth/issue1313/issue.vhdl | 17 | ||||
-rwxr-xr-x | testsuite/synth/issue1313/testsuite.sh | 7 | ||||
-rw-r--r-- | testsuite/testenv.sh | 6 |
3 files changed, 30 insertions, 0 deletions
diff --git a/testsuite/synth/issue1313/issue.vhdl b/testsuite/synth/issue1313/issue.vhdl new file mode 100644 index 000000000..7c5a7a938 --- /dev/null +++ b/testsuite/synth/issue1313/issue.vhdl @@ -0,0 +1,17 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity issue is +end issue; + +architecture beh of issue is +begin + assert "+"(unsigned'("0001"), unsigned'("0001")) = unsigned'("0010"); + assert "-"(unsigned'("0001"), unsigned'("0001")) = unsigned'("0000"); + assert "="(unsigned'("0001"), unsigned'("0001")); + + assert "+"(signed'("0001"), signed'("0001")) = signed'("0010"); + assert "-"(signed'("0001"), signed'("0001")) = signed'("0000"); + assert "="(signed'("0001"), signed'("0001")); +end architecture beh; diff --git a/testsuite/synth/issue1313/testsuite.sh b/testsuite/synth/issue1313/testsuite.sh new file mode 100755 index 000000000..53b1b69ab --- /dev/null +++ b/testsuite/synth/issue1313/testsuite.sh @@ -0,0 +1,7 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only issue + +echo "Test successful" diff --git a/testsuite/testenv.sh b/testsuite/testenv.sh index 4de0838a4..a935b01b5 100644 --- a/testsuite/testenv.sh +++ b/testsuite/testenv.sh @@ -119,6 +119,12 @@ synth_failure () fi } +# Synthesis of a single file +synth_only() +{ + synth $1.vhdl -e > syn_$1.vhdl +} + # Synthesis of a single file and analyze the result synth_analyze() { |