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author | Tristan Gingold <tgingold@free.fr> | 2019-10-02 04:34:56 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-02 04:34:56 +0200 |
commit | a462aa24936a64e32a79286b594490491f7c1dab (patch) | |
tree | e9ad25422869a1ae2146d27a7a4f3a26da36a605 /testsuite | |
parent | 82bb81caf07783f3b7d11276f971a7acb2e86fc3 (diff) | |
download | ghdl-a462aa24936a64e32a79286b594490491f7c1dab.tar.gz ghdl-a462aa24936a64e32a79286b594490491f7c1dab.tar.bz2 ghdl-a462aa24936a64e32a79286b594490491f7c1dab.zip |
testsuite/synth: add tests for previous commit.
Diffstat (limited to 'testsuite')
-rw-r--r-- | testsuite/synth/synth47/test2.vhdl | 22 | ||||
-rw-r--r-- | testsuite/synth/synth47/test3.vhdl | 12 | ||||
-rwxr-xr-x | testsuite/synth/synth47/testsuite.sh | 11 |
3 files changed, 45 insertions, 0 deletions
diff --git a/testsuite/synth/synth47/test2.vhdl b/testsuite/synth/synth47/test2.vhdl new file mode 100644 index 000000000..8b4566387 --- /dev/null +++ b/testsuite/synth/synth47/test2.vhdl @@ -0,0 +1,22 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity test2 is + port (val : out std_logic_vector (63 downto 0)); +end entity test2; + +architecture beh of test2 is + + type t_register is array(0 to 7) of std_logic_vector(7 downto 0); + signal s_register : t_register; + +begin + + -- the problem is the next line + s_register <= (0 => "1111X00Z", 1 => x"e1", 2 => x"d2", 3 => x"c3", + 4 => x"b4", 5 => x"a5", 6 => x"96", 7 => x"87"); + val <= s_register(7) & s_register(6) & s_register(5) & s_register(4) + & s_register(3) & s_register(2) & s_register(1) & s_register(0); + +end architecture beh; diff --git a/testsuite/synth/synth47/test3.vhdl b/testsuite/synth/synth47/test3.vhdl new file mode 100644 index 000000000..705a6fa21 --- /dev/null +++ b/testsuite/synth/synth47/test3.vhdl @@ -0,0 +1,12 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity test3 is + port (val : out std_logic_vector (7 downto 0)); +end entity test3; + +architecture beh of test3 is +begin + + val <= "Z001101X"; +end architecture beh; diff --git a/testsuite/synth/synth47/testsuite.sh b/testsuite/synth/synth47/testsuite.sh new file mode 100755 index 000000000..26947f500 --- /dev/null +++ b/testsuite/synth/synth47/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +for f in test2 test3; do + synth $f.vhdl -e $f > syn_$f.vhdl + analyze syn_$f.vhdl + clean +done + +echo "Test successful" |