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author | Tristan Gingold <tgingold@free.fr> | 2019-08-20 05:22:47 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-08-20 05:22:47 +0200 |
commit | 88c51aef36eb0e98b4df8285cad738917ebc0e29 (patch) | |
tree | f4dd74241e076bba9c8dfe6ac93c6695639c8ce7 /testsuite | |
parent | 6bb756cc46b8c717d7f84cbe6e01ed79f84f484a (diff) | |
download | ghdl-88c51aef36eb0e98b4df8285cad738917ebc0e29.tar.gz ghdl-88c51aef36eb0e98b4df8285cad738917ebc0e29.tar.bz2 ghdl-88c51aef36eb0e98b4df8285cad738917ebc0e29.zip |
testsuite/synth: add a test for previous commit.
Diffstat (limited to 'testsuite')
-rwxr-xr-x | testsuite/synth/psl02/testsuite.sh | 7 | ||||
-rw-r--r-- | testsuite/synth/psl02/verif3.vhdl | 6 |
2 files changed, 13 insertions, 0 deletions
diff --git a/testsuite/synth/psl02/testsuite.sh b/testsuite/synth/psl02/testsuite.sh index 53a6de2d8..0b16872c1 100755 --- a/testsuite/synth/psl02/testsuite.sh +++ b/testsuite/synth/psl02/testsuite.sh @@ -10,9 +10,16 @@ analyze syn_assert1.vhdl synth assert2.vhdl verif1.vhdl -e assert2 > syn_assert21.vhdl analyze syn_assert21.vhdl +clean + synth assert2.vhdl verif2.vhdl -e assert2 > syn_assert22.vhdl analyze syn_assert22.vhdl clean +synth assert2.vhdl verif3.vhdl -e assert2 > syn_assert23.vhdl +analyze syn_assert23.vhdl + +clean + echo "Test successful" diff --git a/testsuite/synth/psl02/verif3.vhdl b/testsuite/synth/psl02/verif3.vhdl new file mode 100644 index 000000000..c1b262177 --- /dev/null +++ b/testsuite/synth/psl02/verif3.vhdl @@ -0,0 +1,6 @@ +vunit verif2 (assert2(behav)) +{ + default clock is rising_edge(clk); + assume always val < 10; + assert always val /= 5 abort rst; +} |