testsuite/gna: add a testcase for previous commit.

2 files changed, 27 insertions, 1 deletions

diff --git a/testsuite/gna/bug0117/repro13.vhdl b/testsuite/gna/bug0117/repro13.vhdl
new file mode 100644
index 000000000..fbd18122d
--- /dev/null
+++ b/testsuite/gna/bug0117/repro13.vhdl
@@ -0,0 +1,26 @@
+entity repro13 is
+end;
+
+architecture behav of repro13 is
+  type my_arr is array (natural range <>) of bit_vector;
+
+  procedure assign (signal v : inout my_arr; d : my_arr) is
+  begin
+    v (d'length - 1 downto 0) <= d;
+  end assign;
+  signal s1 : my_arr (2 downto 0)(3 downto 0);
+begin
+  process
+    variable v0 : my_arr (1 downto 0)(3 downto 0);
+  begin
+    v0 := (x"1", x"2");
+    s1 <= (x"5", x"4", x"3");
+    wait for 1 ns;
+    assign (s1, v0);
+    wait for 1 ns;
+    assert s1(2) = x"5";
+    assert s1(1) = x"1";
+    assert s1(0) = x"2";
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/gna/bug0117/testsuite.sh b/testsuite/gna/bug0117/testsuite.sh
index bcf7bfba2..aee4e9ab7 100755
--- a/testsuite/gna/bug0117/testsuite.sh
+++ b/testsuite/gna/bug0117/testsuite.sh
@@ -3,7 +3,7 @@
 . ../../testenv.sh
 
 export GHDL_STD_FLAGS=--std=08
-for i in repro1 repro4 repro5 repro6 repro7 repro8 repro12; do
+for i in repro1 repro4 repro5 repro6 repro7 repro8 repro12 repro13; do
   analyze $i.vhdl
   elab_simulate $i
 done