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author | Tristan Gingold <tgingold@free.fr> | 2019-10-01 07:42:08 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-01 07:42:08 +0200 |
commit | 4202d78df0bb056f3036b5c9bc789a10148a22c8 (patch) | |
tree | 4b64c6436ff8c30095066a9d32b6a4c0d8c121f1 /testsuite | |
parent | 92616e09b4a050ee9ba4496a3f68b6db2cb2552a (diff) | |
download | ghdl-4202d78df0bb056f3036b5c9bc789a10148a22c8.tar.gz ghdl-4202d78df0bb056f3036b5c9bc789a10148a22c8.tar.bz2 ghdl-4202d78df0bb056f3036b5c9bc789a10148a22c8.zip |
testsuite/synth: add testcase for ghdlsynth-beta 44
Diffstat (limited to 'testsuite')
-rw-r--r-- | testsuite/synth/synth44/record_test.vhdl | 15 | ||||
-rwxr-xr-x | testsuite/synth/synth44/testsuite.sh | 11 |
2 files changed, 26 insertions, 0 deletions
diff --git a/testsuite/synth/synth44/record_test.vhdl b/testsuite/synth/synth44/record_test.vhdl new file mode 100644 index 000000000..91819faff --- /dev/null +++ b/testsuite/synth/synth44/record_test.vhdl @@ -0,0 +1,15 @@ +entity record_test is + port ( + o : out integer + ); +end record_test; + +architecture rtl of record_test is + type t_record is record + int : integer range 0 to 15; + end record t_record; + constant rec_constant : t_record := (int => 8); + signal int_signal : integer range 0 to rec_constant.int := 4; +begin + o <= int_signal; +end rtl; diff --git a/testsuite/synth/synth44/testsuite.sh b/testsuite/synth/synth44/testsuite.sh new file mode 100755 index 000000000..df471fb4d --- /dev/null +++ b/testsuite/synth/synth44/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +for f in record_test; do + synth $f.vhdl -e $f > syn_$f.vhdl +# analyze syn_$f.vhdl +done +clean + +echo "Test successful" |