Add files from ticket.

4 files changed, 126 insertions, 0 deletions

diff --git a/testsuite/gna/issue44/costasloop.vhdl b/testsuite/gna/issue44/costasloop.vhdl
new file mode 100644
index 000000000..26966aa7c
--- /dev/null
+++ b/testsuite/gna/issue44/costasloop.vhdl
@@ -0,0 +1,64 @@
+-- costasloop.vhd
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity costasloop is
+	port(carrier: in signed(11 downto 0);
+		clk, reset: in std_logic;
+		op: out std_logic);
+end costasloop;
+
+architecture costasloop_arch of costasloop is
+	component nco is
+		port(clk, reset: in std_logic;
+		fword: in unsigned(5 downto 0);
+		op_sin: out signed(4 downto 0);
+		op_cos: out signed(4 downto 0));
+	end component;
+
+	component q_one_dot_fp_multiplier is
+		generic (a_word_size, b_word_size:integer);
+		port(a: in signed(a_word_size-1 downto 0);
+			b: in signed(b_word_size-1 downto 0);
+			mult_out: out signed(a_word_size + b_word_size -2 downto 0));
+		end component;
+
+		component lpf is
+			port(clk, reset: in std_logic;
+			x_in: in signed(15 downto 0);
+				y_out: out signed(19 downto 0));
+			end component;
+
+    component loopfilter is
+  port(clk, reset: in std_logic;
+      mult_error_op:in signed(38 downto 0);
+      f_desired: in unsigned(5 downto 0);
+      f_word_output: out unsigned(5 downto 0));
+    end component;
+
+	signal nco_input: unsigned(5 downto 0);
+	signal nco_sin, nco_cos: signed(4 downto 0);
+	signal mult_sin, mult_cos: signed(15 downto 0);
+	signal raw_op_sin, raw_op_cos: signed(19 downto 0);
+	signal mult_error_op: signed(38 downto 0);
+begin
+	--NCO phase multiplier
+	N: nco port map(clk, reset, nco_input, nco_sin, nco_cos);
+
+	--Multiplier
+	M0: q_one_dot_fp_multiplier generic map(a_word_size=>nco_sin'length, b_word_size => carrier'length) port map(nco_sin, carrier, mult_sin);
+	M1: q_one_dot_fp_multiplier generic map(a_word_size=>nco_sin'length, b_word_size => carrier'length) port map(nco_cos, carrier, mult_cos);
+
+	--FIR Filter
+	L0: lpf port map(clk, reset, mult_sin, raw_op_sin);
+	L1: lpf port map(clk, reset, mult_cos, raw_op_cos);
+	--Extract output (Comparator)
+	COMPARATOR: op <= raw_op_sin(raw_op_sin'length -1); --Sign bit
+	--Error Multiplier
+	EM: q_one_dot_fp_multiplier generic map(a_word_size=>raw_op_sin'length, b_word_size => raw_op_cos'length) port map(raw_op_sin, raw_op_cos, mult_error_op);
+	--Loop Filter
+	
+	--NCO mapping to error
+    LF: loopfilter port map(clk, reset, mult_error_op, to_unsigned(16, 6), nco_input);
+end costasloop_arch;
diff --git a/testsuite/gna/issue44/dffregister.vhdl b/testsuite/gna/issue44/dffregister.vhdl
new file mode 100644
index 000000000..b976412ee
--- /dev/null
+++ b/testsuite/gna/issue44/dffregister.vhdl
@@ -0,0 +1,29 @@
+-- dffregister.vhd
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity dffregister is
+  generic (word_size: integer);
+	port(clk, reset: in std_logic;
+  d:in signed(word_size-1 downto 0);
+  reset_word: in signed(word_size-1 downto 0);
+  q:out signed(word_size-1 downto 0));
+end dffregister;
+
+architecture dffregister_arch of dffregister is
+  signal arr:signed(word_size -1 downto 0);
+
+begin
+  q <= arr;
+  process(reset, clk)
+  begin
+    if reset = '1' then
+      arr <= reset_word;
+  elsif rising_edge(clk) then
+      arr <= d;
+    end if;
+
+  end process;
+
+end dffregister_arch;
diff --git a/testsuite/gna/issue44/q_one_dot_fp_multiplier.vhdl b/testsuite/gna/issue44/q_one_dot_fp_multiplier.vhdl
new file mode 100644
index 000000000..133578f4e
--- /dev/null
+++ b/testsuite/gna/issue44/q_one_dot_fp_multiplier.vhdl
@@ -0,0 +1,28 @@
+-- q_one_dot_fp_multiplier.vhd
+--TODO: Better way of handling -1 * -1 case?
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity q_one_dot_fp_multiplier is
+	generic (a_word_size, b_word_size:integer);
+	port(a: in signed(a_word_size-1 downto 0);
+		b: in signed(b_word_size-1 downto 0);
+		mult_out: out signed(a_word_size + b_word_size -2 downto 0));
+end q_one_dot_fp_multiplier;
+
+architecture mult_arch of q_one_dot_fp_multiplier is
+	constant a_minus_1: signed(a'range) := ('1', others=>'0');
+	constant b_minus_1: signed(b'range) := ('1', others => '0');
+begin
+	process(a, b)
+	variable output_temp:signed(mult_out'length downto 0);
+	begin
+		output_temp := a * b;
+		if (a = a_minus_1) and (b = b_minus_1) then
+			mult_out <= ('0', others =>'1');
+		else
+				mult_out <= output_temp(mult_out'length-1 downto 0);
+		end if;
+end process;
+end mult_arch;
diff --git a/testsuite/gna/issue44/testsuite.sh b/testsuite/gna/issue44/testsuite.sh
index d85174d90..fd8fcbed5 100755
--- a/testsuite/gna/issue44/testsuite.sh
+++ b/testsuite/gna/issue44/testsuite.sh
@@ -3,8 +3,13 @@
 . ../../testenv.sh
 
 analyze loopfilter.vhdl
+analyze dffregister.vhdl
 elab_simulate loopfilter
 
+analyze costasloop.vhdl
+analyze q_one_dot_fp_multiplier.vhdl
+
 clean
 
 echo "Test successful"
+