testsuite/synth: Add a test. Close #1460

2 files changed, 28 insertions, 0 deletions

diff --git a/testsuite/synth/issue1460/tb_division_float.vhdl b/testsuite/synth/issue1460/tb_division_float.vhdl
new file mode 100644
index 000000000..514bfee54
--- /dev/null
+++ b/testsuite/synth/issue1460/tb_division_float.vhdl
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.float_pkg.all;
+
+entity tb_division_float is
+end;
+
+architecture behav of tb_division_float is
+  subtype my_float is float (7 downto -6);
+  constant c0 : my_float := (others => '0');
+  signal i0 : my_float := to_float(1.0, c0);
+  signal i1 : my_float := to_float(2.0, c0);
+  signal p0 : my_float;
+begin
+  dut: entity work.division_float
+    port map (i0, i1, p0);
+
+  process
+  begin
+    assert i0 = my_float'(b"0_0111111_000000");
+    assert i1 = my_float'(b"0_1000000_000000");
+    wait for 1 ns;
+    assert p0 = my_float'(b"0_0111110_000000") severity failure;
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/issue1460/testsuite.sh b/testsuite/synth/issue1460/testsuite.sh
index b05373419..a0520d8bb 100755
--- a/testsuite/synth/issue1460/testsuite.sh
+++ b/testsuite/synth/issue1460/testsuite.sh
@@ -8,4 +8,6 @@ for t in leftmost01 leftmost02 leftmost03 rightmost01 rightmost02; do
     synth_tb $t
 done
 
+synth_analyze division_float
+
 echo "Test successful"