testsuite/gna: add a test for #1862

3 files changed, 78 insertions, 0 deletions

diff --git a/testsuite/gna/issue1862/repro.vhdl b/testsuite/gna/issue1862/repro.vhdl
new file mode 100644
index 000000000..3d0b3e3f2
--- /dev/null
+++ b/testsuite/gna/issue1862/repro.vhdl
@@ -0,0 +1,29 @@
+entity repro is
+end entity repro;
+
+architecture beh of repro is
+   type     t_bv_array  is array (natural range <>) of bit_vector;
+   subtype  t_bv_array2  is t_bv_array(open)(15 downto 0);
+begin
+
+  process
+    variable v_val_out : t_bv_array2(0 to 0);
+
+    procedure test_proc2(test_val : out t_bv_array2) is
+        variable v_val : t_bv_array2(0 to 2) := (others => (others => '0'));
+    begin
+        test_val := v_val(0 to test_val'length - 1);
+    end procedure;
+
+    procedure test_proc(test_val : out t_bv_array2) is
+        variable v_val : t_bv_array2(0 to 0);
+    begin
+        test_proc2(test_val(0 to 0));
+    end procedure;
+  begin
+    test_proc(v_val_out);
+    assert false report "This should be printed" severity note;
+    wait;
+  end process;
+
+end architecture beh;
diff --git a/testsuite/gna/issue1862/test.vhdl b/testsuite/gna/issue1862/test.vhdl
new file mode 100644
index 000000000..b9c38a55c
--- /dev/null
+++ b/testsuite/gna/issue1862/test.vhdl
@@ -0,0 +1,35 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity test is
+end entity test;
+
+architecture beh of test is
+   type     t_slv_array  is array (natural range <>) of std_logic_vector;
+   subtype  t_slv_array2  is t_slv_array(open)(15 downto 0);
+begin
+
+  process
+    variable v_val_out : t_slv_array2(0 to 0);
+
+    procedure test_proc2(test_val : out t_slv_array2) is
+        variable v_val : t_slv_array2(0 to 2) := (others => (others => '0'));
+    begin
+        test_val := v_val(0 to test_val'length - 1);
+    end procedure;
+
+    procedure test_proc(test_val : out t_slv_array2) is
+        variable v_val : t_slv_array2(0 to 0);
+    begin
+        test_proc2(test_val(0 to 0));
+        --test_proc2(v_val);
+        --test_val := v_val;
+    end procedure;
+  begin
+    test_proc(v_val_out);
+    assert false report "This should be printed" severity note;
+    wait;
+  end process;
+
+end architecture beh;
diff --git a/testsuite/gna/issue1862/testsuite.sh b/testsuite/gna/issue1862/testsuite.sh
new file mode 100755
index 000000000..66d0c9ad0
--- /dev/null
+++ b/testsuite/gna/issue1862/testsuite.sh
@@ -0,0 +1,14 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+analyze test.vhdl
+elab_simulate test
+
+clean
+
+echo "Test successful"