testsuite/pyunit/libghdl: add tests for comments on the same line

3 files changed, 19 insertions, 0 deletions

diff --git a/testsuite/pyunit/libghdl/Comments.py b/testsuite/pyunit/libghdl/Comments.py
index 594571a5d..850d6137a 100644
--- a/testsuite/pyunit/libghdl/Comments.py
+++ b/testsuite/pyunit/libghdl/Comments.py
@@ -199,6 +199,9 @@ class Instantiate(TestCase):
     def test_sig(self) -> None:
         self.checkFile(self._root / "sig.vhdl")
 
+    def test_sig_2(self) -> None:
+        self.checkFile(self._root / "sig_2.vhdl")
+
     @expectedFailure
     def test_var_fail(self) -> None:
         self.checkFile(self._root / "var_fail.vhdl")
@@ -236,6 +239,9 @@ class Instantiate(TestCase):
     def test_element_3(self) -> None:
         self.checkFile(self._root / "element_3.vhdl")
 
+    def test_element_4(self) -> None:
+        self.checkFile(self._root / "element_4.vhdl")
+
     @expectedFailure
     def test_enum_fail(self) -> None:
         self.checkFile(self._root / "enum_fail.vhdl")
diff --git a/testsuite/pyunit/libghdl/element_4.vhdl b/testsuite/pyunit/libghdl/element_4.vhdl
new file mode 100644
index 000000000..57f5ea16b
--- /dev/null
+++ b/testsuite/pyunit/libghdl/element_4.vhdl
@@ -0,0 +1,7 @@
+package p is
+  type rec is record
+    a : bit; --  Comment for :a:
+    --  Also for :a:
+    b : bit;
+  end record;
+end p;
diff --git a/testsuite/pyunit/libghdl/sig_2.vhdl b/testsuite/pyunit/libghdl/sig_2.vhdl
new file mode 100644
index 000000000..c825a41e5
--- /dev/null
+++ b/testsuite/pyunit/libghdl/sig_2.vhdl
@@ -0,0 +1,6 @@
+architecture arch of ent is
+  signal s1 : bit;  --  comment for :s1:
+  --  Also for :s1:
+  signal s2: natural;
+begin
+end arch;