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author | Tristan Gingold <tgingold@free.fr> | 2013-12-20 04:48:54 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2013-12-20 04:48:54 +0100 |
commit | 6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch) | |
tree | bd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd | |
parent | bd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff) | |
download | ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.gz ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.bz2 ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.zip |
Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd')
-rw-r--r-- | testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd b/testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd new file mode 100644 index 000000000..46264eb5a --- /dev/null +++ b/testsuite/vests/vhdl-ams/ashenden/compliant/frequency-modeling/v_source-1.vhd @@ -0,0 +1,58 @@ + +-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +library ieee; use ieee.math_real.all; +library ieee_proposed; use ieee_proposed.electrical_systems.all; + +entity v_source is + generic ( DC : voltage := 1.0; -- output peak amplitude + min_freq : real := 10.0; -- minimum frequency for spectral source + max_freq : real := 1.0e4; -- maximum frequency for spectral source + ac_mag : voltage := 1.0; -- AC magnitude + ac_phase : real := 0.0 ); -- AC phase [degree] + port ( terminal pos, neg : electrical ); +end entity v_source; + +---------------------------------------------------------------- + +architecture behavior of v_source is + + function g (freq : real) return real is + begin + if (freq > min_freq and freq < max_freq) then + return 1.0; + else + return 0.0; + end if; + end function g; + + quantity vout across iout through pos to neg; + -- declare quantity in frequency domain for AC analysis + quantity ac_spec : real spectrum ac_mag*g(frequency), + math_2_pi*ac_phase/360.0; + +begin + + if domain = quiescent_domain or domain = time_domain use + vout == DC; + else + vout == ac_spec; -- used for frequency (AC) analysis + end use; + +end architecture behavior; |