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author | Tristan Gingold <tgingold@free.fr> | 2013-12-20 04:48:54 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2013-12-20 04:48:54 +0100 |
commit | 6c3f709174e8e4d5411f851cedb7d84c38d3b04a (patch) | |
tree | bd12c79c71a2ee65899a9ade9919ec2045addef8 /testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd | |
parent | bd4aff0f670351c0652cf24e9b04361dc0e3a01c (diff) | |
download | ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.gz ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.tar.bz2 ghdl-6c3f709174e8e4d5411f851cedb7d84c38d3b04a.zip |
Import vests testsuite
Diffstat (limited to 'testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd')
-rw-r--r-- | testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd b/testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd new file mode 100644 index 000000000..66f0030fa --- /dev/null +++ b/testsuite/vests/vhdl-ams/ashenden/compliant/analog-modeling/inline_24a.vhd @@ -0,0 +1,49 @@ + +-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc + +-- This file is part of VESTs (Vhdl tESTs). + +-- VESTs is free software; you can redistribute it and/or modify it +-- under the terms of the GNU General Public License as published by the +-- Free Software Foundation; either version 2 of the License, or (at +-- your option) any later version. + +-- VESTs is distributed in the hope that it will be useful, but WITHOUT +-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. + +-- You should have received a copy of the GNU General Public License +-- along with VESTs; if not, write to the Free Software Foundation, +-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + +library ieee_proposed; +use ieee_proposed.electrical_systems.all; +use ieee_proposed.mechanical_systems.all; + +entity inline_24a is + +end entity inline_24a; + + +architecture test of inline_24a is + + -- code from book + + terminal plus, minus : electrical; + quantity v across i through plus to minus; + + terminal shaft : rotational_v; + quantity applied_torque through shaft; + + -- end code from book + +begin + + -- code from book + + applied_torque == v * i; + + -- end code from book + +end architecture test; |