Import vests testsuite

6 files changed, 260 insertions, 0 deletions

diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl
new file mode 100644
index 000000000..ba58cb6ca
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_and_table.vhdl
@@ -0,0 +1,48 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    CONSTANT and_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', '0', 'U', 'U', 'U', '0', 'U', 'U' ),  -- | U |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | X |
+            ( '0', '0', '0', '0', '0', '0', '0', '0', '0' ),  -- | 0 |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 1 |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | Z |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' ),  -- | W |
+            ( '0', '0', '0', '0', '0', '0', '0', '0', '0' ),  -- | L |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | H |
+            ( 'U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert and_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert and_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert and_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert and_table( '0', '1' ) = '0' report "TEST FAILED-0x1";
+    assert and_table( 'H', 'Z' ) = 'X' report "TEST FAILED-HxZ";
+    assert and_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert and_table( 'L', '1' ) = '0' report "TEST FAILED-Lx1";
+    assert and_table( 'H', '1' ) = '1' report "TEST FAILED-Hx1";
+    assert and_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert and_table( 'Z', 'L' ) = '0' report "TEST FAILED-ZxL";
+    assert and_table( 'Z', 'H' ) = 'X' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl
new file mode 100644
index 000000000..4a2f18650
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_or_table.vhdl
@@ -0,0 +1,49 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    -- truth table for "or" function
+    CONSTANT or_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', 'U', '1', 'U', 'U', 'U', '1', 'U' ),  -- | U |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | X |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 0 |
+            ( '1', '1', '1', '1', '1', '1', '1', '1', '1' ),  -- | 1 |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | Z |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' ),  -- | W |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | L |
+            ( '1', '1', '1', '1', '1', '1', '1', '1', '1' ),  -- | H |
+            ( 'U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert or_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert or_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert or_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert or_table( '0', '1' ) = '1' report "TEST FAILED-0x1";
+    assert or_table( 'H', 'Z' ) = '1' report "TEST FAILED-HxZ";
+    assert or_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert or_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert or_table( 'H', '1' ) = '1' report "TEST FAILED-Hx1";
+    assert or_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert or_table( 'Z', 'L' ) = 'X' report "TEST FAILED-ZxL";
+    assert or_table( 'Z', 'H' ) = '1' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl
new file mode 100644
index 000000000..a87396720
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_resolution_table.vhdl
@@ -0,0 +1,47 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+  CONSTANT resolution_table : stdlogic_table := (
+--  ---------------------------------------------------------
+--  |  U    X    0    1    Z    W    L    H    -        |   |
+--  ---------------------------------------------------------
+    ( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ), -- | U |
+    ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ), -- | X |
+    ( 'U', 'X', '0', 'X', '0', '0', '0', '0', 'X' ), -- | 0 |
+    ( 'U', 'X', 'X', '1', '1', '1', '1', '1', 'X' ), -- | 1 |
+    ( 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', 'X' ), -- | Z |
+    ( 'U', 'X', '0', '1', 'W', 'W', 'W', 'W', 'X' ), -- | W |
+    ( 'U', 'X', '0', '1', 'L', 'W', 'L', 'W', 'X' ), -- | L |
+    ( 'U', 'X', '0', '1', 'H', 'W', 'W', 'H', 'X' ), -- | H |
+    ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' )  -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert resolution_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert resolution_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert resolution_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert resolution_table( '0', '1' ) = 'X' report "TEST FAILED-0x1";
+    assert resolution_table( 'H', 'Z' ) = 'H' report "TEST FAILED-HxZ";
+    assert resolution_table( 'Z', 'W' ) = 'W' report "TEST FAILED-ZxW";
+    assert resolution_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert resolution_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert resolution_table( 'Z', 'L' ) = 'L' report "TEST FAILED-ZxL";
+    assert resolution_table( 'Z', 'H' ) = 'H' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl
new file mode 100644
index 000000000..97bc98508
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_resolution_function.vhdl
@@ -0,0 +1,24 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+  signal x, y, result : std_logic := '1';
+begin  -- only
+  result <= x;
+  result <= y;
+
+  process
+  begin  -- process
+    assert x = '1' report "TEST FAILED" severity failure;
+    assert y = '1' report "TEST FAILED" severity failure;
+    assert result = '1' report "TEST FAILED" severity failure;
+
+    report "TEST PASSED";
+--    x <= 'U';
+--    y <= 'U';
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl
new file mode 100644
index 000000000..a63346315
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_std_logic_type.vhdl
@@ -0,0 +1,43 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+    variable x : std_logic;
+  begin  -- process
+    assert std_logic'pos('U') = 0 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('X') = 1 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('0') = 2 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('1') = 3 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('Z') = 4 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('W') = 5 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('L') = 6 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('H') = 7 report "TEST FAILED" severity FAILURE;
+    assert std_logic'pos('-') = 8 report "TEST FAILED" severity FAILURE;
+
+    assert x'left = 'U' report "TEST FAILED" severity FAILURE;
+    assert x'right = '-' report "TEST FAILED" severity FAILURE;
+    assert x'high = '-' report "TEST FAILED" severity FAILURE;
+    assert x'low = 'U' report "TEST FAILED" severity FAILURE;
+    assert x'ascending = true report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'image('U') = "'U'" report "TEST FAILED" severity FAILURE;
+    assert std_logic'value("'U'") = 'U' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'val(0) = 'U' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'succ('U') = 'X' report "TEST FAILED" severity FAILURE;
+    assert std_logic'pred('-') = 'H' report "TEST FAILED" severity FAILURE;
+
+    assert std_logic'leftof('-') = 'H' report "TEST FAILED" severity FAILURE;
+    assert std_logic'rightof('U') = 'X' report "TEST FAILED" severity FAILURE;
+    
+    report "TEST PASSED" severity note;
+    wait;
+  end process;
+end only;
diff --git a/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl
new file mode 100644
index 000000000..32e55cd6d
--- /dev/null
+++ b/testsuite/vests/vhdl-93/clifton-labs/compliant/functional/std_logic_1164/test_xor_table.vhdl
@@ -0,0 +1,49 @@
+entity test is
+end test;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+package foo is
+  TYPE stdlogic_table IS ARRAY(std_ulogic, std_ulogic) OF std_ulogic;
+    -- truth table for "xor" function
+    CONSTANT xor_table : stdlogic_table := (
+    --      ----------------------------------------------------
+    --      |  U    X    0    1    Z    W    L    H    -         |   |
+    --      ----------------------------------------------------
+            ( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ),  -- | U |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | X |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | 0 |
+            ( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ),  -- | 1 |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | Z |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  -- | W |
+            ( 'U', 'X', '0', '1', 'X', 'X', '0', '1', 'X' ),  -- | L |
+            ( 'U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' ),  -- | H |
+            ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' )   -- | - |
+    );
+end foo;
+
+use work.foo.all;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture only of test is
+
+begin  -- only
+  process
+  begin  -- process
+    assert xor_table( 'U', 'U' ) = 'U' report "TEST FAILED-UxU";
+    assert xor_table( 'U', 'X' ) = 'U' report "TEST FAILED-UxX";
+    assert xor_table( 'X', '-' ) = 'X' report "TEST FAILED-Xx-";
+    assert xor_table( '0', '1' ) = '1' report "TEST FAILED-0x1";
+    assert xor_table( 'H', 'Z' ) = 'X' report "TEST FAILED-HxZ";
+    assert xor_table( 'Z', 'W' ) = 'X' report "TEST FAILED-ZxW";
+    assert xor_table( 'L', '1' ) = '1' report "TEST FAILED-Lx1";
+    assert xor_table( 'H', '1' ) = '0' report "TEST FAILED-Hx1";
+    assert xor_table( '0', 'L' ) = '0' report "TEST FAILED-0xL";
+    assert xor_table( 'Z', 'L' ) = 'X' report "TEST FAILED-ZxL";
+    assert xor_table( 'Z', 'H' ) = 'X' report "TEST FAILED-ZxH";
+    wait;
+  end process;
+end only;