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authorTristan Gingold <tgingold@free.fr>2019-09-28 23:21:05 +0200
committerTristan Gingold <tgingold@free.fr>2019-09-28 23:21:05 +0200
commit59c6890377b635797dff61346a780b4d23436736 (patch)
tree8bceb79f417f51d96c00ae4e1c85b84562b62f07 /testsuite/synth
parent8965ce200b899a43125909bcdac4aceba9dee53d (diff)
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testsuite/synth: add testcase for #945
Diffstat (limited to 'testsuite/synth')
-rw-r--r--testsuite/synth/issue945/ent.vhdl9
-rw-r--r--testsuite/synth/issue945/syn_ent.vhdl13
-rwxr-xr-xtestsuite/synth/issue945/testsuite.sh8
3 files changed, 30 insertions, 0 deletions
diff --git a/testsuite/synth/issue945/ent.vhdl b/testsuite/synth/issue945/ent.vhdl
new file mode 100644
index 000000000..ff2ce407f
--- /dev/null
+++ b/testsuite/synth/issue945/ent.vhdl
@@ -0,0 +1,9 @@
+entity ent is
+end ent;
+
+architecture a of ent is
+ signal test : bit;
+ alias a1 : bit is test;
+ alias a2 : bit is a1;
+begin
+end a;
diff --git a/testsuite/synth/issue945/syn_ent.vhdl b/testsuite/synth/issue945/syn_ent.vhdl
new file mode 100644
index 000000000..3477d2338
--- /dev/null
+++ b/testsuite/synth/issue945/syn_ent.vhdl
@@ -0,0 +1,13 @@
+entity ent is
+end ent;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture rtl of ent is
+ signal test : std_logic;
+begin
+ -- ent.vhdl:5:12
+ test <= <unassigned>; -- (signal)
+end rtl;
diff --git a/testsuite/synth/issue945/testsuite.sh b/testsuite/synth/issue945/testsuite.sh
new file mode 100755
index 000000000..6c14ee73a
--- /dev/null
+++ b/testsuite/synth/issue945/testsuite.sh
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth ent.vhdl -e ent > syn_ent.vhdl
+clean
+
+echo "Test successful"