testsuite/synth: add tests for std_logic_unsigned and std_logic_signed.

1 files changed, 18 insertions, 0 deletions

diff --git a/testsuite/synth/snsuns01/umuls.vhdl b/testsuite/synth/snsuns01/umuls.vhdl
new file mode 100644
index 000000000..57971d214
--- /dev/null
+++ b/testsuite/synth/snsuns01/umuls.vhdl
@@ -0,0 +1,18 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity muls is
+  port (
+    l3 : std_logic_vector (2 downto 0);
+    r4 : std_logic_vector (3 downto 0);
+
+    mul_v3v4 : out std_logic_vector (6 downto 0));
+end muls;
+
+library ieee;
+use ieee.std_logic_unsigned.all;
+
+architecture behav of muls is
+begin
+  mul_v3v4 <= l3 * r4;
+end behav;