testsuite/synth: add tests for std_logic_unsigned and std_logic_signed.

1 files changed, 24 insertions, 0 deletions

diff --git a/testsuite/synth/snsuns01/ucmpne.vhdl b/testsuite/synth/snsuns01/ucmpne.vhdl
new file mode 100644
index 000000000..346b86b6b
--- /dev/null
+++ b/testsuite/synth/snsuns01/ucmpne.vhdl
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity cmpne is
+  port (
+    li : integer;
+    ri : integer;
+    l4 : std_logic_vector (3 downto 0);
+    r3 : std_logic_vector (2 downto 0);
+
+    ne_v4v3 : out boolean;
+    ne_v4i  : out boolean;
+    ne_iv3  : out boolean);
+end cmpne;
+
+library ieee;
+use ieee.std_logic_unsigned.all;
+
+architecture behav of cmpne is
+begin
+  ne_v4v3 <= l4 /= r3;
+  ne_v4i  <= l4 /= ri;
+  ne_iv3  <= li /= r3;
+end behav;