diff options
author | Tristan Gingold <tgingold@free.fr> | 2020-05-21 17:28:37 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2020-05-21 17:28:37 +0200 |
commit | f9f0002babb98fe751f3b71ef009a79e60057f06 (patch) | |
tree | be0667e7d0d15b43e9435bf602bd4376f1fb110a /testsuite/synth/sns01/tb_add03.vhdl | |
parent | 8274d3ac100c1a05dd9fe74bb5d9aa7a371aa42e (diff) | |
download | ghdl-f9f0002babb98fe751f3b71ef009a79e60057f06.tar.gz ghdl-f9f0002babb98fe751f3b71ef009a79e60057f06.tar.bz2 ghdl-f9f0002babb98fe751f3b71ef009a79e60057f06.zip |
testsuite/synth: add a test for previous commit.
Diffstat (limited to 'testsuite/synth/sns01/tb_add03.vhdl')
-rw-r--r-- | testsuite/synth/sns01/tb_add03.vhdl | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/testsuite/synth/sns01/tb_add03.vhdl b/testsuite/synth/sns01/tb_add03.vhdl new file mode 100644 index 000000000..7bc68ea8a --- /dev/null +++ b/testsuite/synth/sns01/tb_add03.vhdl @@ -0,0 +1,24 @@ +entity tb_add03 is +end tb_add03; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_add03 is + signal a, b : std_logic_vector(8 DOWNTO 0); + signal borrow : std_logic; + signal res : std_logic_vector(8 DOWNTO 0); +begin + dut: entity work.add03 + port map (a, b, borrow, res); + + process + begin + a <= b"00000_0100"; + b <= b"00000_0001"; + borrow <= '0'; + wait for 1 ns; + assert res = b"00000_0011" severity failure; + wait; + end process; +end behav; |