testsuite/synth: add ret01 tests.

1 files changed, 19 insertions, 0 deletions

diff --git a/testsuite/synth/ret01/ret02.vhdl b/testsuite/synth/ret01/ret02.vhdl
new file mode 100644
index 000000000..8da4f3012
--- /dev/null
+++ b/testsuite/synth/ret01/ret02.vhdl
@@ -0,0 +1,19 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ret02 is
+  port (di : std_logic_vector (7 downto 0);
+        res : out integer);
+end ret02;
+
+architecture behav of ret02 is
+  function sign (v : std_logic_vector (7 downto 0)) return integer is
+  begin
+    if v (7) = '1' then
+      return -1;
+    end if;
+    return 1;
+  end sign;
+begin
+  res <= sign (di);
+end behav;