testsuite/synth/memmux01: add a test

3 files changed, 98 insertions, 1 deletions

diff --git a/testsuite/synth/memmux01/memmux05.vhdl b/testsuite/synth/memmux01/memmux05.vhdl
new file mode 100644
index 000000000..4a4b35274
--- /dev/null
+++ b/testsuite/synth/memmux01/memmux05.vhdl
@@ -0,0 +1,28 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity memmux05 is
+  port (ad : std_logic;
+        val : std_logic_vector (1 downto 0);
+        dat : std_logic_vector (2 downto 0);
+        res : out std_logic_vector (2 downto 0));
+end memmux05;
+
+architecture behav of memmux05 is
+begin
+  process (ad, val)
+    variable lo : natural;
+    variable t : std_logic_vector(2 downto 0);
+  begin
+    lo := to_integer(unsigned'(0 => ad));
+    t := dat;
+    t (lo + 1 downto lo) := val;
+    res <= t;
+  end process;
+end behav;
+
+--  Expected synthesis:
+--  v15 := ad == 0 ? val : dat[1:0]
+--  res[2:1] := ad == 1 ? val : {dat[2], v15[1]}
+--  res[0] := v15[0]
diff --git a/testsuite/synth/memmux01/tb_memmux05.vhdl b/testsuite/synth/memmux01/tb_memmux05.vhdl
new file mode 100644
index 000000000..919a3fd5b
--- /dev/null
+++ b/testsuite/synth/memmux01/tb_memmux05.vhdl
@@ -0,0 +1,68 @@
+entity tb_memmux05 is
+end tb_memmux05;
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+architecture behav of tb_memmux05 is
+  signal ad : std_logic;
+  signal val : std_logic_vector (1 downto 0);
+  signal dat, res : std_logic_vector (2 downto 0);
+begin
+  dut : entity work.memmux05
+    port map (
+      ad => ad,
+      val => val,
+      dat => dat,
+      res => res);
+
+  process
+  begin
+    dat <= "110";
+
+    ad <= '0';
+    val <= "00";
+    wait for 1 ns;
+    assert res = "100" report "1) res=" & to_bstring (res) severity failure;
+
+    ad <= '1';
+    val <= "00";
+    wait for 1 ns;
+    assert res = "000" report "2) res=" & to_bstring (res) severity failure;
+
+    ad <= '0';
+    val <= "01";
+    wait for 1 ns;
+    assert res = "101" report "3) res=" & to_bstring (res) severity failure;
+
+    ad <= '0';
+    val <= "10";
+    wait for 1 ns;
+    assert res = "110" report "4) res=" & to_bstring (res) severity failure;
+
+    ad <= '1';
+    val <= "10";
+    wait for 1 ns;
+    assert res = "100" report "5) res=" & to_bstring (res) severity failure;
+
+    dat <= "010";
+
+    ad <= '0';
+    val <= "00";
+    wait for 1 ns;
+    assert res = "000" report "6) res=" & to_bstring (res) severity failure;
+
+    ad <= '1';
+    val <= "00";
+    wait for 1 ns;
+    assert res = "000" report "7) res=" & to_bstring (res) severity failure;
+
+    ad <= '1';
+    val <= "10";
+    wait for 1 ns;
+    assert res = "100" report "8) res=" & to_bstring (res) severity failure;
+
+    wait;
+  end process;
+end behav;
diff --git a/testsuite/synth/memmux01/testsuite.sh b/testsuite/synth/memmux01/testsuite.sh
index 024e51d2a..d42d27482 100755
--- a/testsuite/synth/memmux01/testsuite.sh
+++ b/testsuite/synth/memmux01/testsuite.sh
@@ -2,7 +2,8 @@
 
 . ../../testenv.sh
 
-for t in memmux01 memmux02 memmux03 memmux04; do
+GHDL_STD_FLAGS=--std=08
+for t in memmux01 memmux02 memmux03 memmux04 memmux05; do
     analyze $t.vhdl tb_$t.vhdl
     elab_simulate tb_$t
     clean