testsuite/synth: add tests for #1407

3 files changed, 56 insertions, 0 deletions

diff --git a/testsuite/synth/issue1407/fixed_point_example.vhdl b/testsuite/synth/issue1407/fixed_point_example.vhdl
new file mode 100644
index 000000000..9ffb07821
--- /dev/null
+++ b/testsuite/synth/issue1407/fixed_point_example.vhdl
@@ -0,0 +1,19 @@
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.fixed_pkg.all;
+  use ieee.fixed_float_types.all;
+
+entity fixed_point_example is
+  port (
+    data_in  : in std_logic_vector(7 downto 0)
+  );
+end fixed_point_example;
+
+architecture behavioral of fixed_point_example is
+  signal data_tmp : sfixed(5 downto -4);
+begin
+  data_tmp <= resize(
+    to_sfixed(data_in, 3, -4),
+    data_tmp
+  );
+end behavioral;
diff --git a/testsuite/synth/issue1407/repro.vhdl b/testsuite/synth/issue1407/repro.vhdl
new file mode 100644
index 000000000..1d99bd0fc
--- /dev/null
+++ b/testsuite/synth/issue1407/repro.vhdl
@@ -0,0 +1,27 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity repro is
+  port (a : std_logic_vector (3 downto 0);
+        o : out std_logic_vector (3 downto 0));
+end;
+
+architecture behav of repro is
+  function cancel (a : std_logic_vector) return std_logic_vector
+  is
+    variable en : boolean := false;
+    variable res : std_logic_vector (a'range);
+  begin
+    if a'length = 0 then
+      en := true;
+    end if;
+    res := a;
+    if en then
+      res (7) := '0';
+    end if;
+    return res;
+  end cancel;
+begin
+  o <= cancel (a);
+end behav;
+
diff --git a/testsuite/synth/issue1407/testsuite.sh b/testsuite/synth/issue1407/testsuite.sh
new file mode 100755
index 000000000..58bb99337
--- /dev/null
+++ b/testsuite/synth/issue1407/testsuite.sh
@@ -0,0 +1,10 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+GHDL_STD_FLAGS=--std=08
+synth_analyze repro
+synth_analyze fixed_point_example
+clean
+
+echo "Test successful"