testsuite/synth: add a test for #1193

1 files changed, 24 insertions, 0 deletions

diff --git a/testsuite/synth/issue1193/counters_7.vhdl b/testsuite/synth/issue1193/counters_7.vhdl
new file mode 100644
index 000000000..dc231e19b
--- /dev/null
+++ b/testsuite/synth/issue1193/counters_7.vhdl
@@ -0,0 +1,24 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_signed.all;
+
+entity counters_7 is
+    port(C, CLR : in std_logic;
+         Q : out std_logic_vector(3 downto 0));
+end counters_7;
+
+architecture archi of counters_7 is
+    signal tmp: std_logic_vector(3 downto 0);
+begin
+    process (C, CLR)
+    begin
+        if (CLR='1') then
+            tmp <= "0000";
+        elsif (C'event and C='1') then
+            tmp <= tmp + 1;
+        end if;
+    end process;
+
+    Q <= tmp;
+
+end archi;