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authorTristan Gingold <tgingold@free.fr>2019-10-08 19:15:14 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-08 19:15:14 +0200
commit8a0a30827ce0c9394c4d122028ebb65a35304895 (patch)
treea566b2f740659d884004714566d8b42cd92fd9d5 /testsuite/synth/dispvhdl01/vhd02.vhdl
parentf1e3878ee7360e59e1a8d068c25b4cfd46b86e93 (diff)
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testsuite/synth: add a test for the previous commit.
Diffstat (limited to 'testsuite/synth/dispvhdl01/vhd02.vhdl')
-rw-r--r--testsuite/synth/dispvhdl01/vhd02.vhdl13
1 files changed, 13 insertions, 0 deletions
diff --git a/testsuite/synth/dispvhdl01/vhd02.vhdl b/testsuite/synth/dispvhdl01/vhd02.vhdl
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+++ b/testsuite/synth/dispvhdl01/vhd02.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+use work.pkg.all;
+
+entity vhd02 is
+ port (i1 : my_rec;
+ o1 : out my_rec);
+end vhd02;
+
+architecture behav of vhd02 is
+begin
+ o1 <= i1;
+end behav;