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author | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:03:23 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-10-01 20:03:23 +0200 |
commit | 26230727356dfe9533b28166ace0f32c478600fb (patch) | |
tree | b8b21260076fa4c85e906eda11d4f4064e73c413 /testsuite/synth/aggr01/tb_aggr03.vhdl | |
parent | 808bc3fc0865eb9174f9ad35fe2f96de953c2522 (diff) | |
download | ghdl-26230727356dfe9533b28166ace0f32c478600fb.tar.gz ghdl-26230727356dfe9533b28166ace0f32c478600fb.tar.bz2 ghdl-26230727356dfe9533b28166ace0f32c478600fb.zip |
testsuite/synth: add testcase for previous commit
Diffstat (limited to 'testsuite/synth/aggr01/tb_aggr03.vhdl')
-rw-r--r-- | testsuite/synth/aggr01/tb_aggr03.vhdl | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/testsuite/synth/aggr01/tb_aggr03.vhdl b/testsuite/synth/aggr01/tb_aggr03.vhdl new file mode 100644 index 000000000..4f4687041 --- /dev/null +++ b/testsuite/synth/aggr01/tb_aggr03.vhdl @@ -0,0 +1,29 @@ +entity tb_aggr03 is +end tb_aggr03; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_aggr03 is + signal a, b : std_logic_vector(7 downto 0); +begin + dut: entity work.aggr03 + port map (a, b); + + process + begin + a <= x"ff"; + wait for 1 ns; + assert b = x"ff" severity failure; + + a <= x"ee"; + wait for 1 ns; + assert b = x"ef" severity failure; + + a <= x"50"; + wait for 1 ns; + assert b = x"53" severity failure; + + wait; + end process; +end behav; |