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author | Tristan Gingold <tgingold@free.fr> | 2019-07-16 06:58:28 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-07-16 19:26:42 +0200 |
commit | c51e2781d5ddb177bc6e6d35a3ca083ef06899d9 (patch) | |
tree | bed1509f4ebf7d7b3a9951ef111f8847b297dc27 /testsuite/gna | |
parent | 68bfc2ebf115c0b92b4aff36fef77dce8376c948 (diff) | |
download | ghdl-c51e2781d5ddb177bc6e6d35a3ca083ef06899d9.tar.gz ghdl-c51e2781d5ddb177bc6e6d35a3ca083ef06899d9.tar.bz2 ghdl-c51e2781d5ddb177bc6e6d35a3ca083ef06899d9.zip |
Add a testcase about distinct alternate labels.
Diffstat (limited to 'testsuite/gna')
-rw-r--r-- | testsuite/gna/bug0104/alt.vhdl | 67 | ||||
-rw-r--r-- | testsuite/gna/bug0104/alt2.vhdl | 67 | ||||
-rwxr-xr-x | testsuite/gna/bug0104/testsuite.sh | 11 |
3 files changed, 145 insertions, 0 deletions
diff --git a/testsuite/gna/bug0104/alt.vhdl b/testsuite/gna/bug0104/alt.vhdl new file mode 100644 index 000000000..bbdee9bb1 --- /dev/null +++ b/testsuite/gna/bug0104/alt.vhdl @@ -0,0 +1,67 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity delay is + port ( + clk : in std_logic; + reset: in std_logic; + start: in std_logic; + done: out std_logic + ); +end entity delay; + +architecture fast of delay is -- The reader is unenlightened as to fast/slow +begin +end architecture fast; + +architecture slow of delay is +begin +end architecture slow; + +library ieee; +use ieee.std_logic_1164.all; + +entity dut is + generic ( + SPEED : string := "fast" + ); + port( + clk : in std_logic; + reset: in std_logic; + start: in std_logic; + done: out std_logic); + end entity dut; + +architecture dutarch of dut is + + -- component delay is -- component declaration not needed or used here. + -- port ( + -- clk : in std_logic; + -- reset: in std_logic; + -- start: in std_logic; + -- done: out std_logic + -- ); + -- end component delay; + begin +d1g: + if SPEED = "fast" generate +d1: -- The alternative labels, if any, within an if generate statement or a + -- case generate statement shall all be distinct. 11.8 Generate statements + entity work.delay(fast) + port map ( + clk => clk, + reset => reset, + start => start, + done => done + ); + else generate +d1: -- This isn't a distinct label in the else alternative + entity work.delay(slow) + port map ( + clk => clk, + reset => reset, + start => start, + done => done + ); + end generate; +end architecture dutarch; diff --git a/testsuite/gna/bug0104/alt2.vhdl b/testsuite/gna/bug0104/alt2.vhdl new file mode 100644 index 000000000..15c920216 --- /dev/null +++ b/testsuite/gna/bug0104/alt2.vhdl @@ -0,0 +1,67 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity delay is + port ( + clk : in std_logic; + reset: in std_logic; + start: in std_logic; + done: out std_logic + ); +end entity delay; + +architecture fast of delay is -- The reader is unenlightened as to fast/slow +begin +end architecture fast; + +architecture slow of delay is +begin +end architecture slow; + +library ieee; +use ieee.std_logic_1164.all; + +entity dut is + generic ( + SPEED : string := "fast" + ); + port( + clk : in std_logic; + reset: in std_logic; + start: in std_logic; + done: out std_logic); + end entity dut; + +architecture dutarch of dut is + + -- component delay is -- component declaration not needed or used here. + -- port ( + -- clk : in std_logic; + -- reset: in std_logic; + -- start: in std_logic; + -- done: out std_logic + -- ); + -- end component delay; + begin +d1g: + if l1: SPEED = "fast" generate +d1: -- The alternative labels, if any, within an if generate statement or a + -- case generate statement shall all be distinct. 11.8 Generate statements + entity work.delay(fast) + port map ( + clk => clk, + reset => reset, + start => start, + done => done + ); + else l1: generate +d1: -- This isn't a distinct label in the else alternative + entity work.delay(slow) + port map ( + clk => clk, + reset => reset, + start => start, + done => done + ); + end generate; +end architecture dutarch; diff --git a/testsuite/gna/bug0104/testsuite.sh b/testsuite/gna/bug0104/testsuite.sh new file mode 100755 index 000000000..efcef3bc3 --- /dev/null +++ b/testsuite/gna/bug0104/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +analyze_failure alt2.vhdl +analyze alt.vhdl + +clean + +echo "Test successful" |