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author | Tristan Gingold <tgingold@free.fr> | 2016-12-12 21:15:38 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2016-12-13 20:12:40 +0100 |
commit | 9c5f5e3a84c2c77167e943d076dcc44c1a22d81e (patch) | |
tree | 64ba78d0b3171373e5847e7974835a6b09702722 /testsuite/gna | |
parent | 15cc8103e06050484e357a3928dedcc691c59535 (diff) | |
download | ghdl-9c5f5e3a84c2c77167e943d076dcc44c1a22d81e.tar.gz ghdl-9c5f5e3a84c2c77167e943d076dcc44c1a22d81e.tar.bz2 ghdl-9c5f5e3a84c2c77167e943d076dcc44c1a22d81e.zip |
Add reproducer for #191
Diffstat (limited to 'testsuite/gna')
-rw-r--r-- | testsuite/gna/issue191/repro.vhdl | 20 | ||||
-rwxr-xr-x | testsuite/gna/issue191/testsuite.sh | 11 |
2 files changed, 31 insertions, 0 deletions
diff --git a/testsuite/gna/issue191/repro.vhdl b/testsuite/gna/issue191/repro.vhdl new file mode 100644 index 000000000..51b11c93c --- /dev/null +++ b/testsuite/gna/issue191/repro.vhdl @@ -0,0 +1,20 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity e is +end entity; + +architecture a of e is + type t_rec is record + addr : std_logic_vector; + end record; + + function init_signals(bits : natural) return t_rec is + variable result : t_rec(addr(bits - 1 downto 0)); + begin + result.addr := (others => '0'); + -- result.addr := (result.addr'range => '0'); -- this works + return result; + end function; +begin +end architecture; diff --git a/testsuite/gna/issue191/testsuite.sh b/testsuite/gna/issue191/testsuite.sh new file mode 100755 index 000000000..ab5703a18 --- /dev/null +++ b/testsuite/gna/issue191/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +# Cannot yet generate code. +$GHDL -s --std=08 repro.vhdl + +clean + +echo "Test successful" |