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author | Tristan Gingold <tgingold@free.fr> | 2019-08-10 06:04:06 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-08-10 06:04:06 +0200 |
commit | 87ecd5eb42f94369dd55702686967439b378a913 (patch) | |
tree | 2c68fceb91af00a39b10549e84450c9cd66f9cbb /testsuite/gna | |
parent | ffd1826443067ed63de998c3a301103305e3ab0d (diff) | |
download | ghdl-87ecd5eb42f94369dd55702686967439b378a913.tar.gz ghdl-87ecd5eb42f94369dd55702686967439b378a913.tar.bz2 ghdl-87ecd5eb42f94369dd55702686967439b378a913.zip |
Add testcase for #886
Diffstat (limited to 'testsuite/gna')
-rw-r--r-- | testsuite/gna/issue886/ent.vhdl | 103 | ||||
-rw-r--r-- | testsuite/gna/issue886/repro.vhdl | 8 | ||||
-rw-r--r-- | testsuite/gna/issue886/repro2.vhdl | 8 | ||||
-rw-r--r-- | testsuite/gna/issue886/repro3.vhdl | 9 | ||||
-rwxr-xr-x | testsuite/gna/issue886/testsuite.sh | 13 |
5 files changed, 141 insertions, 0 deletions
diff --git a/testsuite/gna/issue886/ent.vhdl b/testsuite/gna/issue886/ent.vhdl new file mode 100644 index 000000000..f1d9e4dfd --- /dev/null +++ b/testsuite/gna/issue886/ent.vhdl @@ -0,0 +1,103 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +package pong_pkg is + subtype short is signed(16 downto 0); + + type direction is (UP, DOWN, NONE); + type dimension is record + w : short; + h : short; + end record; + + constant SCREEN_SIZE : dimension := ( w => to_signed(640, short'length), + h => to_signed(480, short'length) ); + + type location is record + r : short; + c : short; + end record; + + type paddle is record + loc : location; + dir : direction; + end record; + + component paddle_mover is + generic( + paddle_size : dimension; + screen_size : dimension; + reset_loc : location + ); + port( + clk : in std_logic; + en : in std_logic; + rst : in std_logic; + dir : in direction; + q : in paddle; + d : out paddle + ); + end component; +end package; + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.pong_pkg.all; + +entity paddle_mover is +generic( + paddle_size : dimension := (w => to_signed(1, short'length), h => to_signed(1 short'length)); + screen_size : dimension := (w => to_signed(1, short'length), h => to_signed(1 short'length)); + reset_loc : location := (r => to_signed(1, short'length), c => to_signed(1 short'length)) +); +port( + clk : in std_logic; + en : in std_logic; + rst : in std_logic; + dir : in direction; + q : in paddle; + d : out paddle +); +end entity; + +architecture beh of paddle_mover is + + constant velocity : short := to_signed(1, short'length); + + signal next_candidate :paddle := (dir => NONE, loc => (others => 1)); + signal next_paddle : paddle := (dir => NONE, loc => (others => 1)); + signal next_moves : std_logic := '0'; + signal off_bottom : std_logic := '0'; + signal off_top : std_logic := '0'; +begin + + next_candidate.dir <= q.dir; + next_candidate.loc.c <= q.loc.c; + + next_candidate.loc.r <= q.loc.r + velocity when dir = DOWN else + q.loc.r - velocity when dir = UP else + q.loc.r; + + off_bottom <= (next_candidate.loc.r + paddle_size.h) >= screen_size.h; + off_top <= next_candidate.loc.r <= to_unsigned(0, short'length); + + next_moves <= off_bottom nor off_top; + + next_paddle.dir <= next_candidate.dir; + next_paddle.loc.c <= next_candidate.loc.c; + next_paddle.loc.r <= next_candidate.loc.r when next_moves = '1' else q.loc.r; + + process(clk) + begin + if rising_edge(clk) then + if rst = '1' then + d.loc <= reset_loc; + elsif en = '1' then + d <= next_paddle; + end if; + end if; + end process; +end architecture; diff --git a/testsuite/gna/issue886/repro.vhdl b/testsuite/gna/issue886/repro.vhdl new file mode 100644 index 000000000..ba606a18d --- /dev/null +++ b/testsuite/gna/issue886/repro.vhdl @@ -0,0 +1,8 @@ +entity repro is +end; + +architecture behav of repro is + constant c : string := "hello"; + constant d : time := 1 c'length; +begin +end behav; diff --git a/testsuite/gna/issue886/repro2.vhdl b/testsuite/gna/issue886/repro2.vhdl new file mode 100644 index 000000000..ffb2e7830 --- /dev/null +++ b/testsuite/gna/issue886/repro2.vhdl @@ -0,0 +1,8 @@ +entity repro2 is +end; + +architecture behav of repro2 is + constant c : string := "hello"; + constant d : time := 1.5e2 c'length; +begin +end behav; diff --git a/testsuite/gna/issue886/repro3.vhdl b/testsuite/gna/issue886/repro3.vhdl new file mode 100644 index 000000000..963d48232 --- /dev/null +++ b/testsuite/gna/issue886/repro3.vhdl @@ -0,0 +1,9 @@ +entity repro3 is +end; + +architecture behav of repro3 is + component comp is + end component comp; + constant d : time := 1 comp; +begin +end behav; diff --git a/testsuite/gna/issue886/testsuite.sh b/testsuite/gna/issue886/testsuite.sh new file mode 100755 index 000000000..56adf9c55 --- /dev/null +++ b/testsuite/gna/issue886/testsuite.sh @@ -0,0 +1,13 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure ent.vhdl +analyze_failure repro.vhdl +analyze_failure --force-analysis repro.vhdl +analyze_failure repro2.vhdl +analyze_failure repro3.vhdl + +clean + +echo "Test successful" |