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author | Tristan Gingold <tgingold@free.fr> | 2016-10-11 06:24:11 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2016-10-11 06:24:11 +0200 |
commit | 5d416b6feede7116a39119d3cee254809bb18de6 (patch) | |
tree | f8d48b37f21b6e9c49261865306504a0b7dbef4d /testsuite/gna | |
parent | 72c482acdfafc0883bd72db4adb25ed0f6173540 (diff) | |
download | ghdl-5d416b6feede7116a39119d3cee254809bb18de6.tar.gz ghdl-5d416b6feede7116a39119d3cee254809bb18de6.tar.bz2 ghdl-5d416b6feede7116a39119d3cee254809bb18de6.zip |
Add reproducer for issue #163
Diffstat (limited to 'testsuite/gna')
-rw-r--r-- | testsuite/gna/issue163/qualified_expr.vhdl | 21 | ||||
-rwxr-xr-x | testsuite/gna/issue163/testsuite.sh | 9 |
2 files changed, 30 insertions, 0 deletions
diff --git a/testsuite/gna/issue163/qualified_expr.vhdl b/testsuite/gna/issue163/qualified_expr.vhdl new file mode 100644 index 000000000..455bb0a2c --- /dev/null +++ b/testsuite/gna/issue163/qualified_expr.vhdl @@ -0,0 +1,21 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity qualified_expr is + port ( + X : in std_logic_vector(7 downto 0); + CIn : in std_logic; + Y : out std_logic_vector(7 downto 0) + ); +end entity; + + +architecture rtl of qualified_expr is +begin + -- analyze error with GHDL + Y <= std_logic_vector(unsigned(X) + unsigned'((0 to 0 => CIn))); + + -- analyses with GHDL but not with other tools + --Y <= std_logic_vector(unsigned(X) + unsigned'(0 to 0 => CIn)); +end architecture; diff --git a/testsuite/gna/issue163/testsuite.sh b/testsuite/gna/issue163/testsuite.sh new file mode 100755 index 000000000..9dd48c733 --- /dev/null +++ b/testsuite/gna/issue163/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze qualified_expr.vhdl +elab_simulate qualified_expr +clean + +echo "Test successful" |