testsuite: add reproducer for issue #912

3 files changed, 67 insertions, 0 deletions

diff --git a/testsuite/gna/issue912/mwe_entity.vhdl b/testsuite/gna/issue912/mwe_entity.vhdl
new file mode 100644
index 000000000..718375468
--- /dev/null
+++ b/testsuite/gna/issue912/mwe_entity.vhdl
@@ -0,0 +1,17 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity mwe_entity is
+  port (
+        input : in std_logic;
+        output : out std_logic
+  );
+end mwe_entity;
+
+architecture behav of mwe_entity is
+begin
+	process(input)
+	begin
+		output <= input;
+	end process;
+end behav;	
diff --git a/testsuite/gna/issue912/mwe_tb.vhdl b/testsuite/gna/issue912/mwe_tb.vhdl
new file mode 100644
index 000000000..184bea72f
--- /dev/null
+++ b/testsuite/gna/issue912/mwe_tb.vhdl
@@ -0,0 +1,31 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity mwe_tb is
+end mwe_tb;
+
+architecture testbench of mwe_tb is
+    component mwe_entity is
+        port(
+            input : in std_logic;
+            output: out std_logic
+        );
+    end component;
+    signal i,o : std_logic;
+begin
+    dut:mwe_entity
+    port map(input => i,output => o);
+
+    process
+    begin
+        for t in 0 to 10 loop
+            i <= '1';
+            wait for 5 ns;
+            assert o = '1' severity failure;
+            i <= '0';
+            wait for 5 ns;
+            assert o = '0' severity failure;
+        end loop;
+        wait;
+    end process;
+end testbench;
diff --git a/testsuite/gna/issue912/testsuite.sh b/testsuite/gna/issue912/testsuite.sh
new file mode 100755
index 000000000..4277deaa9
--- /dev/null
+++ b/testsuite/gna/issue912/testsuite.sh
@@ -0,0 +1,19 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+GHDL_STD_FLAGS=--std=00
+analyze mwe_entity.vhdl mwe_tb.vhdl
+elab_simulate_failure mwe_tb
+
+GHDL_STD_FLAGS="--std=00 --syn-binding"
+analyze mwe_entity.vhdl mwe_tb.vhdl
+elab_simulate mwe_tb
+
+GHDL_STD_FLAGS=--std=02
+analyze mwe_entity.vhdl mwe_tb.vhdl
+elab_simulate mwe_tb
+
+clean
+
+echo "Test successful"