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author | Tristan Gingold <tgingold@free.fr> | 2015-05-13 06:58:04 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2015-05-13 06:58:04 +0200 |
commit | 9f700fc624a10e380198df0b53f874a3de963560 (patch) | |
tree | 66841eaada6bc5e10c8ff5d4979262049a5bae97 /testsuite/gna/ticket48 | |
parent | 6e168c5503339772dab0768e93a301318d705bcf (diff) | |
download | ghdl-9f700fc624a10e380198df0b53f874a3de963560.tar.gz ghdl-9f700fc624a10e380198df0b53f874a3de963560.tar.bz2 ghdl-9f700fc624a10e380198df0b53f874a3de963560.zip |
Ticket 48 testcase.
Diffstat (limited to 'testsuite/gna/ticket48')
-rw-r--r-- | testsuite/gna/ticket48/ref.vhdl | 6 | ||||
-rw-r--r-- | testsuite/gna/ticket48/ref1.vhdl | 7 | ||||
-rwxr-xr-x | testsuite/gna/ticket48/testsuite.sh | 34 |
3 files changed, 47 insertions, 0 deletions
diff --git a/testsuite/gna/ticket48/ref.vhdl b/testsuite/gna/ticket48/ref.vhdl new file mode 100644 index 000000000..f9c574f89 --- /dev/null +++ b/testsuite/gna/ticket48/ref.vhdl @@ -0,0 +1,6 @@ +entity ent is +end entity; + +architecture a of ent is +begin +end architecture; diff --git a/testsuite/gna/ticket48/ref1.vhdl b/testsuite/gna/ticket48/ref1.vhdl new file mode 100644 index 000000000..aeffbb7b8 --- /dev/null +++ b/testsuite/gna/ticket48/ref1.vhdl @@ -0,0 +1,7 @@ +entity ent is +end entity; + +architecture a of ent is +begin + -- Comment added. +end architecture; diff --git a/testsuite/gna/ticket48/testsuite.sh b/testsuite/gna/ticket48/testsuite.sh new file mode 100755 index 000000000..bf40a99a3 --- /dev/null +++ b/testsuite/gna/ticket48/testsuite.sh @@ -0,0 +1,34 @@ +#! /bin/sh + +. ../../testenv.sh + +# Build from scratch +cp ref.vhdl bug.vhdl +analyze bug.vhdl +elab_simulate ent + +# No change. +touch bug.vhdl +elab_simulate ent + +# Still no change. +cp ref.vhdl bug.vhdl +elab_simulate ent + +# Modify file +cp ref1.vhdl bug.vhdl +if elab_simulate ent; then + # cannot use elab_simulate_failure as it doesn't work in that case (it's a + # feature: it expects only simulation failures). + echo "failure expected" + exit 1 +fi + +# Re-analyze +analyze bug.vhdl +elab_simulate ent + +rm -f bug.vhdl +clean + +echo "Test successful" |