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author | Tristan Gingold <tgingold@free.fr> | 2019-08-14 07:29:25 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-08-14 07:29:25 +0200 |
commit | f2bb88484488ec158562399a213498a15a8599f9 (patch) | |
tree | e7fb6629bfebb964fe242ecc8098629b8645db1d /testsuite/gna/perf02-long/add_155.vhd | |
parent | f19c700de1543f6c02f5ced17d79bf7a4f37e3f8 (diff) | |
download | ghdl-f2bb88484488ec158562399a213498a15a8599f9.tar.gz ghdl-f2bb88484488ec158562399a213498a15a8599f9.tar.bz2 ghdl-f2bb88484488ec158562399a213498a15a8599f9.zip |
testsuite/gna: rename perf02 to not run it normally.
Diffstat (limited to 'testsuite/gna/perf02-long/add_155.vhd')
-rw-r--r-- | testsuite/gna/perf02-long/add_155.vhd | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/testsuite/gna/perf02-long/add_155.vhd b/testsuite/gna/perf02-long/add_155.vhd new file mode 100644 index 000000000..cba3e6d2f --- /dev/null +++ b/testsuite/gna/perf02-long/add_155.vhd @@ -0,0 +1,33 @@ +library ieee; +use ieee.std_logic_1164.all; + +library ieee; +use ieee.numeric_std.all; + +entity add_155 is + port ( + output : out std_logic_vector(63 downto 0); + in_a : in std_logic_vector(63 downto 0); + in_b : in std_logic_vector(63 downto 0) + ); +end add_155; + +architecture augh of add_155 is + + signal carry_inA : std_logic_vector(65 downto 0); + signal carry_inB : std_logic_vector(65 downto 0); + signal carry_res : std_logic_vector(65 downto 0); + +begin + + -- To handle the CI input, the operation is '1' + CI + -- If CI is not present, the operation is '1' + '0' + carry_inA <= '0' & in_a & '1'; + carry_inB <= '0' & in_b & '0'; + -- Compute the result + carry_res <= std_logic_vector(unsigned(carry_inA) + unsigned(carry_inB)); + + -- Set the outputs + output <= carry_res(64 downto 1); + +end architecture; |