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authorTristan Gingold <tgingold@free.fr>2016-05-25 20:12:09 +0200
committerTristan Gingold <tgingold@free.fr>2016-05-25 20:12:09 +0200
commit5ce9f062ab79bccf02f0ee08f9456749371a8af3 (patch)
treed6afb150e5f10081580ba9272dd69916afe71811 /testsuite/gna/issue72
parent374e3a249bedc06156fe72803f04a941e49af7c1 (diff)
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Add testcase for issue72.
Diffstat (limited to 'testsuite/gna/issue72')
-rw-r--r--testsuite/gna/issue72/fixed.vhdl33
-rw-r--r--testsuite/gna/issue72/issue.vhdl32
-rw-r--r--testsuite/gna/issue72/issue_pkg.vhdl5
-rwxr-xr-xtestsuite/gna/issue72/testsuite.sh11
4 files changed, 81 insertions, 0 deletions
diff --git a/testsuite/gna/issue72/fixed.vhdl b/testsuite/gna/issue72/fixed.vhdl
new file mode 100644
index 000000000..214c6049a
--- /dev/null
+++ b/testsuite/gna/issue72/fixed.vhdl
@@ -0,0 +1,33 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.issue_pkg.t_one_two; -- does not work
+use work.issue_pkg."=";
+--use work.issue_pkg.all; -- works
+
+entity issue is
+
+ port (
+ clk : in std_logic;
+ input : in t_one_two;
+ output : out std_logic
+ );
+
+end entity issue;
+
+architecture rtl of issue is
+
+begin -- architecture rtl
+
+ process (clk) is
+ begin -- process
+ if clk'event and clk = '1' then -- rising clock edge
+ if input = one then
+ output <= '1';
+ else
+ output <= '0';
+ end if;
+ end if;
+ end process;
+
+end architecture rtl;
diff --git a/testsuite/gna/issue72/issue.vhdl b/testsuite/gna/issue72/issue.vhdl
new file mode 100644
index 000000000..9eb2132df
--- /dev/null
+++ b/testsuite/gna/issue72/issue.vhdl
@@ -0,0 +1,32 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+use work.issue_pkg.t_one_two; -- does not work
+--use work.issue_pkg.all; -- works
+
+entity issue is
+
+ port (
+ clk : in std_logic;
+ input : in t_one_two;
+ output : out std_logic
+ );
+
+end entity issue;
+
+architecture rtl of issue is
+
+begin -- architecture rtl
+
+ process (clk) is
+ begin -- process
+ if clk'event and clk = '1' then -- rising clock edge
+ if input = one then
+ output <= '1';
+ else
+ output <= '0';
+ end if;
+ end if;
+ end process;
+
+end architecture rtl;
diff --git a/testsuite/gna/issue72/issue_pkg.vhdl b/testsuite/gna/issue72/issue_pkg.vhdl
new file mode 100644
index 000000000..2d01d86e6
--- /dev/null
+++ b/testsuite/gna/issue72/issue_pkg.vhdl
@@ -0,0 +1,5 @@
+package issue_pkg is
+
+ type t_one_two is (one, two);
+
+end package issue_pkg;
diff --git a/testsuite/gna/issue72/testsuite.sh b/testsuite/gna/issue72/testsuite.sh
new file mode 100755
index 000000000..36494f4bb
--- /dev/null
+++ b/testsuite/gna/issue72/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze issue_pkg.vhdl
+analyze_failure issue.vhdl
+analyze fixed.vhdl
+
+clean
+
+echo "Test successful"