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authorTristan Gingold <tgingold@free.fr>2018-11-10 07:51:12 +0100
committerTristan Gingold <tgingold@free.fr>2018-11-10 07:51:12 +0100
commit8f35f3dc75e039479965218e7c6e1e34a4d8ff93 (patch)
tree73ad59edff5bf6889dd0cf59f36d23c9797f812d /testsuite/gna/issue642
parent3bd4d200a891ac813d60aa6bd9d055f43da972d6 (diff)
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Add testcase for #642
Close #642
Diffstat (limited to 'testsuite/gna/issue642')
-rw-r--r--testsuite/gna/issue642/ent.vhdl17
-rw-r--r--testsuite/gna/issue642/repro.vhdl18
-rwxr-xr-xtestsuite/gna/issue642/testsuite.sh14
3 files changed, 49 insertions, 0 deletions
diff --git a/testsuite/gna/issue642/ent.vhdl b/testsuite/gna/issue642/ent.vhdl
new file mode 100644
index 000000000..cae8c41cd
--- /dev/null
+++ b/testsuite/gna/issue642/ent.vhdl
@@ -0,0 +1,17 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity test is
+end entity;
+
+architecture a of test is
+ signal Combined : std_logic_vector(16 downto 0);
+
+ signal SingleBit : std_logic;
+ signal Part1 : std_logic_vector(7 downto 0);
+ signal Part2 : std_logic_vector(7 downto 0);
+begin
+ (Part1, Part2) <= Combined(Combined'left - 1 downto 0); -- line 14: can't match 'part1' with type std_ulogic; can't match 'part2' with type std_ulogic
+ (SingleBit, Part1, Part2) <= Combined; -- line 15: can't match 'part1' with type std_ulogic; can't match 'part2' with type std_ulogic
+end architecture;
+
diff --git a/testsuite/gna/issue642/repro.vhdl b/testsuite/gna/issue642/repro.vhdl
new file mode 100644
index 000000000..e1288f47a
--- /dev/null
+++ b/testsuite/gna/issue642/repro.vhdl
@@ -0,0 +1,18 @@
+entity repro is
+end entity;
+
+architecture a of repro is
+ signal Combined : bit_vector(16 downto 0);
+
+ signal SingleBit : bit;
+ signal Part1 : bit_vector(7 downto 0);
+ signal Part2 : bit_vector(7 downto 0);
+begin
+ process
+ begin
+ (Part1, Part2) <= Combined(Combined'left - 1 downto 0);
+ (SingleBit, Part1, Part2) <= Combined;
+ wait;
+ end process;
+end architecture;
+
diff --git a/testsuite/gna/issue642/testsuite.sh b/testsuite/gna/issue642/testsuite.sh
new file mode 100755
index 000000000..e132bd00e
--- /dev/null
+++ b/testsuite/gna/issue642/testsuite.sh
@@ -0,0 +1,14 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+analyze ent.vhdl
+elab_simulate test
+
+clean
+
+echo "Test successful"