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author | Tristan Gingold <tgingold@free.fr> | 2017-10-22 20:59:02 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-10-22 20:59:02 +0200 |
commit | a70e34db18ae133e760de7fb898f72bf41653f79 (patch) | |
tree | d409cc1a161e61e5140383b3d84fae7be632ce88 /testsuite/gna/issue190/e.vhdl | |
parent | d1bcdf138b3852a16799b3b92d6747736e9938eb (diff) | |
download | ghdl-a70e34db18ae133e760de7fb898f72bf41653f79.tar.gz ghdl-a70e34db18ae133e760de7fb898f72bf41653f79.tar.bz2 ghdl-a70e34db18ae133e760de7fb898f72bf41653f79.zip |
Add testcase from #190.
Diffstat (limited to 'testsuite/gna/issue190/e.vhdl')
-rw-r--r-- | testsuite/gna/issue190/e.vhdl | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/testsuite/gna/issue190/e.vhdl b/testsuite/gna/issue190/e.vhdl new file mode 100644 index 000000000..905efe7d1 --- /dev/null +++ b/testsuite/gna/issue190/e.vhdl @@ -0,0 +1,20 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity e is +end entity; + +architecture a of e is + signal foo : std_logic_vector(7 downto 0); + signal bar : std_logic; + + procedure proc(constant addr : in std_logic_vector; signal output : out std_logic) is + alias addr_alias : std_logic_vector(addr'length downto 0) is addr; -- inherited non-staticness from addr? + begin + -- case addr(1 downto 0) is -- not static, even if addr is of kind constant + case addr_alias(1 downto 0) is -- see local constant declarations + when others => output <= 'X'; + end case; + end procedure; +begin +end architecture; |