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authorTristan Gingold <tgingold@free.fr>2013-12-31 19:01:02 +0100
committerTristan Gingold <tgingold@free.fr>2013-12-31 19:01:02 +0100
commit2fe0a5359e1bdf6dfdab20bea121db8f4e54ffe9 (patch)
tree157d64a590676f8072ae923f8416a683f9680d99 /testsuite/gna/bug21274/21274.vhd
parentac09ce13531d11929f927ad5f79f4a219bee81f1 (diff)
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+library ieee;
+use ieee.std_logic_1164.all;
+
+entity e is
+ generic(SIZE: INTEGER := 8);
+end entity e;
+
+architecture a of e is
+ signal bufreg: STD_LOGIC_VECTOR((2 * SIZE - 1) downto 0);
+ alias ADreg1 is bufreg((2 * SIZE - 1) downto SIZE);
+ alias ADreg2: std_logic_vector((2 * SIZE - 1) downto SIZE) is bufreg((2 * SIZE - 1) downto SIZE);
+
+begin
+end architecture;