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| author | Tristan Gingold <tgingold@free.fr> | 2021-02-27 17:15:35 +0100 | 
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2021-02-27 17:15:35 +0100 | 
| commit | e01d0227af0092db12a6e08f3b8278d860b37416 (patch) | |
| tree | 7ed3bf7bd9b4eb171df585a69b143a47800b2037 /src | |
| parent | 8e23efc43c07a714b4f429be836c86eddf167b4e (diff) | |
| download | ghdl-e01d0227af0092db12a6e08f3b8278d860b37416.tar.gz ghdl-e01d0227af0092db12a6e08f3b8278d860b37416.tar.bz2 ghdl-e01d0227af0092db12a6e08f3b8278d860b37416.zip | |
synth: handle pow and arctan from ieee.math_real.  Fix #1665
Diffstat (limited to 'src')
| -rw-r--r-- | src/std_names.adb | 1 | ||||
| -rw-r--r-- | src/std_names.ads | 13 | ||||
| -rw-r--r-- | src/synth/synth-static_oper.adb | 16 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-math_real.adb | 4 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 2 | 
5 files changed, 30 insertions, 6 deletions
| diff --git a/src/std_names.adb b/src/std_names.adb index a8218aa3d..df2e399ce 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -671,6 +671,7 @@ package body Std_Names is        Def ("log2",               Name_Log2);        Def ("sin",                Name_Sin);        Def ("cos",                Name_Cos); +      Def ("arctan",             Name_Arctan);        Def ("shl",                Name_Shl);        Def ("shr",                Name_Shr);        Def ("ext",                Name_Ext); diff --git a/src/std_names.ads b/src/std_names.ads index 8c903019a..bd6429bff 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -754,12 +754,13 @@ package Std_Names is     Name_Log2               : constant Name_Id := Name_First_Ieee_Name + 042;     Name_Sin                : constant Name_Id := Name_First_Ieee_Name + 043;     Name_Cos                : constant Name_Id := Name_First_Ieee_Name + 044; -   Name_Shl                : constant Name_Id := Name_First_Ieee_Name + 045; -   Name_Shr                : constant Name_Id := Name_First_Ieee_Name + 046; -   Name_Ext                : constant Name_Id := Name_First_Ieee_Name + 047; -   Name_Sxt                : constant Name_Id := Name_First_Ieee_Name + 048; -   Name_Find_Leftmost      : constant Name_Id := Name_First_Ieee_Name + 049; -   Name_Find_Rightmost     : constant Name_Id := Name_First_Ieee_Name + 050; +   Name_Arctan             : constant Name_Id := Name_First_Ieee_Name + 045; +   Name_Shl                : constant Name_Id := Name_First_Ieee_Name + 046; +   Name_Shr                : constant Name_Id := Name_First_Ieee_Name + 047; +   Name_Ext                : constant Name_Id := Name_First_Ieee_Name + 048; +   Name_Sxt                : constant Name_Id := Name_First_Ieee_Name + 049; +   Name_Find_Leftmost      : constant Name_Id := Name_First_Ieee_Name + 050; +   Name_Find_Rightmost     : constant Name_Id := Name_First_Ieee_Name + 051;     Name_Last_Ieee_Name     : constant Name_Id := Name_Find_Rightmost;     Name_First_Synthesis    : constant Name_Id := Name_Last_Ieee_Name + 1; diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index c0faa0d78..bd53f73b9 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -610,6 +610,15 @@ package body Synth.Static_Oper is                 end if;              end; +         when Iir_Predefined_Ieee_Math_Real_Pow => +            declare +               function Pow (L, R : Fp64) return Fp64; +               pragma Import (C, Pow); +            begin +               return Create_Memory_Fp64 +                 (Pow (Read_Fp64 (Left), Read_Fp64 (Right)), Res_Typ); +            end; +           when others =>              Error_Msg_Synth                (+Expr, "synth_static_dyadic_predefined: unhandled " @@ -1012,6 +1021,13 @@ package body Synth.Static_Oper is              begin                 return Create_Memory_Fp64 (Cos (Read_Fp64 (Param1)), Res_Typ);              end; +         when Iir_Predefined_Ieee_Math_Real_Arctan => +            declare +               function Atan (Arg : Fp64) return Fp64; +               pragma Import (C, Atan); +            begin +               return Create_Memory_Fp64 (Atan (Read_Fp64 (Param1)), Res_Typ); +            end;           when others =>              Error_Msg_Synth                (+Expr, "unhandled (static) function: " diff --git a/src/vhdl/vhdl-ieee-math_real.adb b/src/vhdl/vhdl-ieee-math_real.adb index e0bcaefd5..d11030d49 100644 --- a/src/vhdl/vhdl-ieee-math_real.adb +++ b/src/vhdl/vhdl-ieee-math_real.adb @@ -50,6 +50,10 @@ package body Vhdl.Ieee.Math_Real is                       Predef := Iir_Predefined_Ieee_Math_Real_Sin;                    when Name_Cos =>                       Predef := Iir_Predefined_Ieee_Math_Real_Cos; +                  when Name_Arctan => +                     Predef := Iir_Predefined_Ieee_Math_Real_Arctan; +                  when Name_Op_Exp => +                     Predef := Iir_Predefined_Ieee_Math_Real_Pow;                    when others =>                       null;                 end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index e03a941b2..d86ebdf86 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5904,6 +5904,8 @@ package Vhdl.Nodes is        Iir_Predefined_Ieee_Math_Real_Log2,        Iir_Predefined_Ieee_Math_Real_Sin,        Iir_Predefined_Ieee_Math_Real_Cos, +      Iir_Predefined_Ieee_Math_Real_Arctan, +      Iir_Predefined_Ieee_Math_Real_Pow,        --  Std_Logic_Unsigned (synopsys extension).        Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, | 
