diff options
author | Tristan Gingold <tgingold@free.fr> | 2022-06-05 17:54:18 +0200 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2022-06-05 17:54:18 +0200 |
commit | cd9f37d3907caec541ff501d092b3e9f6f823dc4 (patch) | |
tree | e25601f371fbc01decd75dbe3072ec9139a3527e /src | |
parent | cedc5e056534f8c30843947d7cf925f3cf082856 (diff) | |
download | ghdl-cd9f37d3907caec541ff501d092b3e9f6f823dc4.tar.gz ghdl-cd9f37d3907caec541ff501d092b3e9f6f823dc4.tar.bz2 ghdl-cd9f37d3907caec541ff501d092b3e9f6f823dc4.zip |
synth-vhdl_eval: handle more operations (sgn/uns reduce)
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/synth-vhdl_eval.adb | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb index 2e7e26d22..4edf85c47 100644 --- a/src/synth/synth-vhdl_eval.adb +++ b/src/synth/synth-vhdl_eval.adb @@ -1611,20 +1611,30 @@ package body Synth.Vhdl_Eval is Operand.Typ); when Iir_Predefined_Ieee_1164_And_Suv - | Iir_Predefined_Ieee_Numeric_Std_And_Uns => + | Iir_Predefined_Ieee_Numeric_Std_And_Uns + | Iir_Predefined_Ieee_Numeric_Std_And_Sgn => return Eval_Vector_Reduce ('1', Operand, And_Table, False); - when Iir_Predefined_Ieee_1164_Nand_Suv => + when Iir_Predefined_Ieee_1164_Nand_Suv + | Iir_Predefined_Ieee_Numeric_Std_Nand_Uns + | Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn => return Eval_Vector_Reduce ('1', Operand, And_Table, True); when Iir_Predefined_Ieee_1164_Or_Suv - | Iir_Predefined_Ieee_Numeric_Std_Or_Uns => + | Iir_Predefined_Ieee_Numeric_Std_Or_Uns + | Iir_Predefined_Ieee_Numeric_Std_Or_Sgn => return Eval_Vector_Reduce ('0', Operand, Or_Table, False); - when Iir_Predefined_Ieee_1164_Nor_Suv => + when Iir_Predefined_Ieee_1164_Nor_Suv + | Iir_Predefined_Ieee_Numeric_Std_Nor_Uns + | Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn => return Eval_Vector_Reduce ('0', Operand, Or_Table, True); - when Iir_Predefined_Ieee_1164_Xor_Suv => + when Iir_Predefined_Ieee_1164_Xor_Suv + | Iir_Predefined_Ieee_Numeric_Std_Xor_Uns + | Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn => return Eval_Vector_Reduce ('0', Operand, Xor_Table, False); - when Iir_Predefined_Ieee_1164_Xnor_Suv => + when Iir_Predefined_Ieee_1164_Xnor_Suv + | Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns + | Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn => return Eval_Vector_Reduce ('0', Operand, Xor_Table, True); when others => |