vhdl: recognize conv_integer functions from std_logic_arith.

5 files changed, 40 insertions, 23 deletions

diff --git a/src/std_names.adb b/src/std_names.adb
index a19c9c6c0..d4722240c 100644
--- a/src/std_names.adb
+++ b/src/std_names.adb
@@ -647,7 +647,9 @@ package body Std_Names is
       Def ("rotate_left",        Name_Rotate_Left);
       Def ("rotate_right",       Name_Rotate_Right);
       Def ("to_bitvector",       Name_To_Bitvector);
+      Def ("conv_signed",        Name_Conv_Signed);
       Def ("conv_unsigned",      Name_Conv_Unsigned);
+      Def ("conv_integer",       Name_Conv_Integer);
       Def ("math_real",          Name_Math_Real);
       Def ("ceil",               Name_Ceil);
       Def ("log2",               Name_Log2);
diff --git a/src/std_names.ads b/src/std_names.ads
index db3e82414..710c04814 100644
--- a/src/std_names.ads
+++ b/src/std_names.ads
@@ -728,10 +728,12 @@ package Std_Names is
    Name_Rotate_Left        : constant Name_Id := Name_First_Ieee + 026;
    Name_Rotate_Right       : constant Name_Id := Name_First_Ieee + 027;
    Name_To_Bitvector       : constant Name_Id := Name_First_Ieee + 028;
-   Name_Conv_Unsigned      : constant Name_Id := Name_First_Ieee + 029;
-   Name_Math_Real          : constant Name_Id := Name_First_Ieee + 030;
-   Name_Ceil               : constant Name_Id := Name_First_Ieee + 031;
-   Name_Log2               : constant Name_Id := Name_First_Ieee + 032;
+   Name_Conv_Signed        : constant Name_Id := Name_First_Ieee + 029;
+   Name_Conv_Unsigned      : constant Name_Id := Name_First_Ieee + 030;
+   Name_Conv_Integer       : constant Name_Id := Name_First_Ieee + 031;
+   Name_Math_Real          : constant Name_Id := Name_First_Ieee + 032;
+   Name_Ceil               : constant Name_Id := Name_First_Ieee + 033;
+   Name_Log2               : constant Name_Id := Name_First_Ieee + 034;
    Name_Last_Ieee          : constant Name_Id := Name_Log2;
 
    --  Verilog Directives.
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb
index 6754193aa..c08a85bb3 100644
--- a/src/synth/synth-oper.adb
+++ b/src/synth/synth-oper.adb
@@ -1075,7 +1075,8 @@ package body Synth.Oper is
                   end if;
                end if;
             end;
-         when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat =>
+         when Iir_Predefined_Ieee_Numeric_Std_Toint_Uns_Nat
+           | Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns =>
             --  UNSIGNED to Natural.
             declare
                Int_Type : constant Type_Acc :=
diff --git a/src/vhdl/vhdl-ieee-std_logic_arith.adb b/src/vhdl/vhdl-ieee-std_logic_arith.adb
index abb7218d2..28bf913a1 100644
--- a/src/vhdl/vhdl-ieee-std_logic_arith.adb
+++ b/src/vhdl/vhdl-ieee-std_logic_arith.adb
@@ -27,8 +27,23 @@ package body Vhdl.Ieee.Std_Logic_Arith is
    Unsigned_Type : Iir := Null_Iir;
    Signed_Type : Iir := Null_Iir;
 
-   type Arg_Kind is (Type_Signed, Type_Unsigned, Type_Int,
-                     Type_Log, Type_Slv);
+   type Arg_Kind is (Type_Signed, Type_Unsigned, Type_Int, Type_Log, Type_Slv);
+
+   subtype Conv_Arg_Kind is Arg_Kind range Type_Signed .. Type_Log;
+   type Conv_Pattern_Type is
+     array (Conv_Arg_Kind) of Iir_Predefined_Functions;
+
+   Conv_Uns_Patterns : constant Conv_Pattern_Type :=
+     (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log);
+
+   Conv_Int_Patterns : constant Conv_Pattern_Type :=
+     (Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Int,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log);
 
    Error : exception;
 
@@ -59,24 +74,14 @@ package body Vhdl.Ieee.Std_Logic_Arith is
       Arg1, Arg2 : Iir;
       Arg1_Kind, Arg2_Kind : Arg_Kind;
 
-      function Handle_Conv_Unsigned return Iir_Predefined_Functions is
+      function Handle_Conv (Pats : Conv_Pattern_Type)
+                           return Iir_Predefined_Functions is
       begin
          if Arg2_Kind /= Type_Int then
             raise Error;
          end if;
-         case Arg1_Kind is
-            when Type_Int =>
-               return Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int;
-            when Type_Unsigned =>
-               return Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns;
-            when Type_Signed =>
-               return Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn;
-            when Type_Log =>
-               return Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log;
-            when others =>
-               raise Error;
-         end case;
-      end Handle_Conv_Unsigned;
+         return Pats (Arg1_Kind);
+      end Handle_Conv;
 
       Def : Iir_Predefined_Functions;
    begin
@@ -146,13 +151,15 @@ package body Vhdl.Ieee.Std_Logic_Arith is
 
                   case Get_Identifier (Decl) is
                      when Name_Conv_Unsigned =>
-                        Def := Handle_Conv_Unsigned;
+                        Def := Handle_Conv (Conv_Uns_Patterns);
                      when others =>
                         null;
                   end case;
                else
                   --  Monadic function.
                   case Get_Identifier (Decl) is
+                     when Name_Conv_Integer =>
+                        Def := Conv_Int_Patterns (Arg1_Kind);
                      when others =>
                         null;
                   end case;
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index 44d25880d..bd25fb805 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -5110,7 +5110,12 @@ package Vhdl.Nodes is
       Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int,
       Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns,
       Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn,
-      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Log,
+
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Int,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Uns,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Sgn,
+      Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Integer_Log
      );
 
    --  Return TRUE iff FUNC is a short-cut predefined function.