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author | Tristan Gingold <tgingold@free.fr> | 2017-12-19 18:11:42 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-12-21 07:36:46 +0100 |
commit | 787ef6f900f18ea853c01edaf00f0e6836b61834 (patch) | |
tree | 35dda8ea46fd47ed20784acac2b494af4267d2ee /src | |
parent | 07fca900ea7744f45044b93dcac6887671ad93f6 (diff) | |
download | ghdl-787ef6f900f18ea853c01edaf00f0e6836b61834.tar.gz ghdl-787ef6f900f18ea853c01edaf00f0e6836b61834.tar.bz2 ghdl-787ef6f900f18ea853c01edaf00f0e6836b61834.zip |
simul: fix issue228.
Diffstat (limited to 'src')
-rw-r--r-- | src/vhdl/simulate/simul-simulation-main.adb | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/vhdl/simulate/simul-simulation-main.adb b/src/vhdl/simulate/simul-simulation-main.adb index 47925c6e5..bd51b5b24 100644 --- a/src/vhdl/simulate/simul-simulation-main.adb +++ b/src/vhdl/simulate/simul-simulation-main.adb @@ -473,9 +473,11 @@ package body Simul.Simulation.Main is (E.Instance, "psl assertion", E.Stmt, "assertion violation", 2); when Iir_Kind_Psl_Cover_Statement => - Execute_Failed_Assertion - (E.Instance, "psl cover", E.Stmt, - "sequence covered", 0); + if Get_Report_Expression (E.Stmt) /= Null_Iir then + Execute_Failed_Assertion + (E.Instance, "psl cover", E.Stmt, + "sequence covered", 0); + end if; E.Done := True; when others => Error_Kind ("PSL_Process_Executer", E.Stmt); |