vhdl: decode to_x01 (from ieee.std_logic_1164)

4 files changed, 52 insertions, 18 deletions

diff --git a/src/std_names.adb b/src/std_names.adb
index b84667839..f9768b68c 100644
--- a/src/std_names.adb
+++ b/src/std_names.adb
@@ -653,6 +653,9 @@ package body Std_Names is
       Def ("to_stdulogicvector", Name_To_Stdulogicvector);
       Def ("is_x",               Name_Is_X);
       Def ("to_01",              Name_To_01);
+      Def ("to_x01",             Name_To_X01);
+      Def ("to_x01z",            Name_To_X01Z);
+      Def ("to_ux01",            Name_To_UX01);
       Def ("conv_signed",        Name_Conv_Signed);
       Def ("conv_unsigned",      Name_Conv_Unsigned);
       Def ("conv_integer",       Name_Conv_Integer);
diff --git a/src/std_names.ads b/src/std_names.ads
index 4a088a239..7082f13e3 100644
--- a/src/std_names.ads
+++ b/src/std_names.ads
@@ -736,24 +736,27 @@ package Std_Names is
    Name_To_Stdulogicvector : constant Name_Id := Name_First_Ieee_Name + 023;
    Name_Is_X               : constant Name_Id := Name_First_Ieee_Name + 024;
    Name_To_01              : constant Name_Id := Name_First_Ieee_Name + 025;
-   Name_Conv_Signed        : constant Name_Id := Name_First_Ieee_Name + 026;
-   Name_Conv_Unsigned      : constant Name_Id := Name_First_Ieee_Name + 027;
-   Name_Conv_Integer       : constant Name_Id := Name_First_Ieee_Name + 028;
-   Name_Conv_Std_Logic_Vector : constant Name_Id := Name_First_Ieee_Name + 029;
-   Name_And_Reduce         : constant Name_Id := Name_First_Ieee_Name + 030;
-   Name_Nand_Reduce        : constant Name_Id := Name_First_Ieee_Name + 031;
-   Name_Or_Reduce          : constant Name_Id := Name_First_Ieee_Name + 032;
-   Name_Nor_Reduce         : constant Name_Id := Name_First_Ieee_Name + 033;
-   Name_Xor_Reduce         : constant Name_Id := Name_First_Ieee_Name + 034;
-   Name_Xnor_Reduce        : constant Name_Id := Name_First_Ieee_Name + 035;
-   Name_Ceil               : constant Name_Id := Name_First_Ieee_Name + 036;
-   Name_Floor              : constant Name_Id := Name_First_Ieee_Name + 037;
-   Name_Round              : constant Name_Id := Name_First_Ieee_Name + 038;
-   Name_Log2               : constant Name_Id := Name_First_Ieee_Name + 039;
-   Name_Sin                : constant Name_Id := Name_First_Ieee_Name + 040;
-   Name_Cos                : constant Name_Id := Name_First_Ieee_Name + 041;
-   Name_Ext                : constant Name_Id := Name_First_Ieee_Name + 042;
-   Name_Sxt                : constant Name_Id := Name_First_Ieee_Name + 043;
+   Name_To_X01             : constant Name_Id := Name_First_Ieee_Name + 026;
+   Name_To_X01Z            : constant Name_Id := Name_First_Ieee_Name + 027;
+   Name_To_UX01            : constant Name_Id := Name_First_Ieee_Name + 028;
+   Name_Conv_Signed        : constant Name_Id := Name_First_Ieee_Name + 029;
+   Name_Conv_Unsigned      : constant Name_Id := Name_First_Ieee_Name + 030;
+   Name_Conv_Integer       : constant Name_Id := Name_First_Ieee_Name + 031;
+   Name_Conv_Std_Logic_Vector : constant Name_Id := Name_First_Ieee_Name + 032;
+   Name_And_Reduce         : constant Name_Id := Name_First_Ieee_Name + 033;
+   Name_Nand_Reduce        : constant Name_Id := Name_First_Ieee_Name + 034;
+   Name_Or_Reduce          : constant Name_Id := Name_First_Ieee_Name + 035;
+   Name_Nor_Reduce         : constant Name_Id := Name_First_Ieee_Name + 036;
+   Name_Xor_Reduce         : constant Name_Id := Name_First_Ieee_Name + 037;
+   Name_Xnor_Reduce        : constant Name_Id := Name_First_Ieee_Name + 038;
+   Name_Ceil               : constant Name_Id := Name_First_Ieee_Name + 039;
+   Name_Floor              : constant Name_Id := Name_First_Ieee_Name + 040;
+   Name_Round              : constant Name_Id := Name_First_Ieee_Name + 041;
+   Name_Log2               : constant Name_Id := Name_First_Ieee_Name + 042;
+   Name_Sin                : constant Name_Id := Name_First_Ieee_Name + 043;
+   Name_Cos                : constant Name_Id := Name_First_Ieee_Name + 044;
+   Name_Ext                : constant Name_Id := Name_First_Ieee_Name + 045;
+   Name_Sxt                : constant Name_Id := Name_First_Ieee_Name + 046;
    Name_Last_Ieee_Name     : constant Name_Id := Name_Sxt;
 
    Name_First_Synthesis    : constant Name_Id := Name_Last_Ieee_Name + 1;
diff --git a/src/vhdl/vhdl-ieee-std_logic_1164.adb b/src/vhdl/vhdl-ieee-std_logic_1164.adb
index bb4b12bce..44fc5f631 100644
--- a/src/vhdl/vhdl-ieee-std_logic_1164.adb
+++ b/src/vhdl/vhdl-ieee-std_logic_1164.adb
@@ -322,6 +322,13 @@ package body Vhdl.Ieee.Std_Logic_1164 is
                      Predefined :=
                        Iir_Predefined_Ieee_1164_To_Stdulogicvector_Bv;
                   end if;
+               when Name_To_X01 =>
+                  if Is_Vector_Function (Decl) then
+                     --  TODO: distinguish slv/suv.
+                     Predefined := Iir_Predefined_Ieee_1164_To_X01_Slv;
+                  elsif Is_Scalar_Function (Decl) then
+                     Predefined := Iir_Predefined_Ieee_1164_To_X01_Log;
+                  end if;
                when others =>
                   if Is_Scalar_Scalar_Function (Decl) then
                      case Get_Identifier (Decl) is
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index 97eeccf24..07faf5b7b 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -5500,6 +5500,27 @@ package Vhdl.Nodes is
       Iir_Predefined_Ieee_1164_To_Stdulogicvector_Bv,
       Iir_Predefined_Ieee_1164_To_Stdulogicvector_Slv,
 
+      Iir_Predefined_Ieee_1164_To_X01_Slv,
+      Iir_Predefined_Ieee_1164_To_X01_Suv,
+      Iir_Predefined_Ieee_1164_To_X01_Log,
+      Iir_Predefined_Ieee_1164_To_X01_Bv_Slv,
+      Iir_Predefined_Ieee_1164_To_X01_Bv_Suv,
+      Iir_Predefined_Ieee_1164_To_X01_Bit_Log,
+
+      Iir_Predefined_Ieee_1164_To_X01Z_Slv,
+      Iir_Predefined_Ieee_1164_To_X01Z_Suv,
+      Iir_Predefined_Ieee_1164_To_X01Z_Log,
+      Iir_Predefined_Ieee_1164_To_X01Z_Bv_Slv,
+      Iir_Predefined_Ieee_1164_To_X01Z_Bv_Suv,
+      Iir_Predefined_Ieee_1164_To_X01Z_Bit_Log,
+
+      Iir_Predefined_Ieee_1164_To_UX01_Slv,
+      Iir_Predefined_Ieee_1164_To_UX01_Suv,
+      Iir_Predefined_Ieee_1164_To_UX01_Log,
+      Iir_Predefined_Ieee_1164_To_UX01_Bv_Slv,
+      Iir_Predefined_Ieee_1164_To_UX01_Bv_Suv,
+      Iir_Predefined_Ieee_1164_To_UX01_Bit_Log,
+
       Iir_Predefined_Ieee_1164_Vector_Is_X,
       Iir_Predefined_Ieee_1164_Scalar_Is_X,