diff options
| author | Tristan Gingold <tgingold@free.fr> | 2019-11-26 19:35:48 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-26 19:35:48 +0100 |
| commit | 43ee1ba79a5d7753701b20b294f9f379e45c1b96 (patch) | |
| tree | e46f28556003ae7023ff21d77e4d2a827daa82c8 /src | |
| parent | e50321edd0f9790b7a6c85179979dfe29790580e (diff) | |
| download | ghdl-43ee1ba79a5d7753701b20b294f9f379e45c1b96.tar.gz ghdl-43ee1ba79a5d7753701b20b294f9f379e45c1b96.tar.bz2 ghdl-43ee1ba79a5d7753701b20b294f9f379e45c1b96.zip | |
vhdl: recognize sin and cos from math_real.
Diffstat (limited to 'src')
| -rw-r--r-- | src/std_names.adb | 2 | ||||
| -rw-r--r-- | src/std_names.ads | 4 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-math_real.adb | 4 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 2 |
4 files changed, 11 insertions, 1 deletions
diff --git a/src/std_names.adb b/src/std_names.adb index ff53371f0..5612363d4 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -650,6 +650,8 @@ package body Std_Names is Def ("math_real", Name_Math_Real); Def ("ceil", Name_Ceil); Def ("log2", Name_Log2); + Def ("sin", Name_Sin); + Def ("cos", Name_Cos); Def ("allconst", Name_Allconst); Def ("allseq", Name_Allseq); diff --git a/src/std_names.ads b/src/std_names.ads index 1b0d8b094..57901576b 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -731,7 +731,9 @@ package Std_Names is Name_Math_Real : constant Name_Id := Name_First_Ieee + 032; Name_Ceil : constant Name_Id := Name_First_Ieee + 033; Name_Log2 : constant Name_Id := Name_First_Ieee + 034; - Name_Last_Ieee : constant Name_Id := Name_Log2; + Name_Sin : constant Name_Id := Name_First_Ieee + 035; + Name_Cos : constant Name_Id := Name_First_Ieee + 036; + Name_Last_Ieee : constant Name_Id := Name_Cos; Name_First_Synthesis : constant Name_Id := Name_Last_Ieee + 1; Name_Allconst : constant Name_Id := Name_First_Synthesis + 000; diff --git a/src/vhdl/vhdl-ieee-math_real.adb b/src/vhdl/vhdl-ieee-math_real.adb index d62e4c246..1ac5a9b10 100644 --- a/src/vhdl/vhdl-ieee-math_real.adb +++ b/src/vhdl/vhdl-ieee-math_real.adb @@ -44,6 +44,10 @@ package body Vhdl.Ieee.Math_Real is Predef := Iir_Predefined_Ieee_Math_Real_Ceil; when Name_Log2 => Predef := Iir_Predefined_Ieee_Math_Real_Log2; + when Name_Sin => + Predef := Iir_Predefined_Ieee_Math_Real_Sin; + when Name_Cos => + Predef := Iir_Predefined_Ieee_Math_Real_Cos; when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 10ad3d853..1f65efb0f 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5065,6 +5065,8 @@ package Vhdl.Nodes is -- Math_Real Iir_Predefined_Ieee_Math_Real_Ceil, Iir_Predefined_Ieee_Math_Real_Log2, + Iir_Predefined_Ieee_Math_Real_Sin, + Iir_Predefined_Ieee_Math_Real_Cos, -- Std_Logic_Unsigned (synopsys extension). Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, |