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author | Tristan Gingold <tgingold@free.fr> | 2022-05-06 06:09:12 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-05-06 06:09:12 +0200 |
commit | 2804d2726adbb6cca68731526a0df54ebd767beb (patch) | |
tree | 1c1f05af7123bd666a1f1a0f4cf6fa4d47a919de /src | |
parent | c9f6a193253ca2e8ce8059c16d2c56c679c9c13d (diff) | |
download | ghdl-2804d2726adbb6cca68731526a0df54ebd767beb.tar.gz ghdl-2804d2726adbb6cca68731526a0df54ebd767beb.tar.bz2 ghdl-2804d2726adbb6cca68731526a0df54ebd767beb.zip |
elab-vhdl_context: introduce signal_index
Diffstat (limited to 'src')
-rw-r--r-- | src/synth/elab-vhdl_context.adb | 7 | ||||
-rw-r--r-- | src/synth/elab-vhdl_context.ads | 3 | ||||
-rw-r--r-- | src/synth/elab-vhdl_values.ads | 5 |
3 files changed, 12 insertions, 3 deletions
diff --git a/src/synth/elab-vhdl_context.adb b/src/synth/elab-vhdl_context.adb index 032ab82b0..0865d2c8e 100644 --- a/src/synth/elab-vhdl_context.adb +++ b/src/synth/elab-vhdl_context.adb @@ -25,7 +25,12 @@ with Vhdl.Utils; package body Elab.Vhdl_Context is - Sig_Nbr : Uns32 := 0; + Sig_Nbr : Signal_Index := 0; + + function Get_Nbr_Signal return Signal_Index is + begin + return Sig_Nbr; + end Get_Nbr_Signal; package Inst_Tables is new Tables (Table_Component_Type => Synth_Instance_Acc, diff --git a/src/synth/elab-vhdl_context.ads b/src/synth/elab-vhdl_context.ads index ea4d4cd67..7f1ec288f 100644 --- a/src/synth/elab-vhdl_context.ads +++ b/src/synth/elab-vhdl_context.ads @@ -102,6 +102,9 @@ package Elab.Vhdl_Context is Typ : Type_Acc; Init : Value_Acc); + -- Number of created signals. + function Get_Nbr_Signal return Signal_Index; + -- Create a sub instance: either a direct entity instantiation, or -- a component instantiation. procedure Create_Sub_Instance (Syn_Inst : Synth_Instance_Acc; diff --git a/src/synth/elab-vhdl_values.ads b/src/synth/elab-vhdl_values.ads index 047f294ba..ebb249a9d 100644 --- a/src/synth/elab-vhdl_values.ads +++ b/src/synth/elab-vhdl_values.ads @@ -67,13 +67,15 @@ package Elab.Vhdl_Values is subtype File_Index is Grt.Files_Operations.Ghdl_File_Index; + subtype Signal_Index is Uns32; + type Value_Type (Kind : Value_Kind) is record case Kind is when Value_Net | Value_Wire => N : Uns32; when Value_Signal => - S : Uns32; + S : Signal_Index; Init : Value_Acc; when Value_Memory => Mem : Memory_Ptr; @@ -174,5 +176,4 @@ package Elab.Vhdl_Values is procedure Write_Value (Dest : Memory_Ptr; Vt : Valtyp); procedure Update_Index (Rng : Discrete_Range_Type; V : in out Valtyp); - end Elab.Vhdl_Values; |