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| author | Tristan Gingold <tgingold@free.fr> | 2020-03-30 07:03:01 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-03-30 07:03:01 +0200 |
| commit | 2490d35c8fe822e0929b5c2f82d8fa3517d28819 (patch) | |
| tree | 28d5c8093274ff31a213e4354840520a6dd6a41f /src | |
| parent | c44197a646adae880e0a8e0382dcde64b7aeec35 (diff) | |
| download | ghdl-2490d35c8fe822e0929b5c2f82d8fa3517d28819.tar.gz ghdl-2490d35c8fe822e0929b5c2f82d8fa3517d28819.tar.bz2 ghdl-2490d35c8fe822e0929b5c2f82d8fa3517d28819.zip | |
synth: improve support of conditionnal operator. Fix #1177
Diffstat (limited to 'src')
| -rw-r--r-- | src/synth/synth-oper.adb | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index 08892424d..cddb5ed49 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -663,6 +663,7 @@ package body Synth.Oper is | Iir_Predefined_Ieee_1164_Scalar_And => return Synth_Bit_Dyadic (Id_And); when Iir_Predefined_Bit_Xor + | Iir_Predefined_Boolean_Xor | Iir_Predefined_Ieee_1164_Scalar_Xor => return Synth_Bit_Dyadic (Id_Xor); when Iir_Predefined_Bit_Or @@ -677,6 +678,7 @@ package body Synth.Oper is | Iir_Predefined_Ieee_1164_Scalar_Nand => return Synth_Bit_Dyadic (Id_Nand); when Iir_Predefined_Bit_Xnor + | Iir_Predefined_Boolean_Xnor | Iir_Predefined_Ieee_1164_Scalar_Xnor => return Synth_Bit_Dyadic (Id_Xnor); @@ -1381,7 +1383,8 @@ package body Synth.Oper is when Iir_Predefined_Ieee_1164_Vector_Or_Reduce => return Synth_Vec_Reduce_Monadic(Id_Red_Or); when Iir_Predefined_Ieee_1164_Condition_Operator => - return Operand; + return Create_Value_Net + (Get_Net (Operand), Get_Value_Type (Syn_Inst, Get_Type (Imp))); when Iir_Predefined_Integer_Negation => declare N : Net; |