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| author | Tristan Gingold <tgingold@free.fr> | 2019-08-13 22:19:48 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-08-13 22:19:48 +0200 |
| commit | 485b8f6b0260f5c0a72b8d6c42ad76c52fd889a1 (patch) | |
| tree | efcaf32d54152ee168be736ec263ba08f2900209 /src/vhdl/vhdl-nodes_walk.adb | |
| parent | 77f0f241a86a93d9781d8c1a8d71eec6d79d642e (diff) | |
| download | ghdl-485b8f6b0260f5c0a72b8d6c42ad76c52fd889a1.tar.gz ghdl-485b8f6b0260f5c0a72b8d6c42ad76c52fd889a1.tar.bz2 ghdl-485b8f6b0260f5c0a72b8d6c42ad76c52fd889a1.zip | |
vhdl-nodes_walk: handle iir_kind_psl_default_clock.
Diffstat (limited to 'src/vhdl/vhdl-nodes_walk.adb')
| -rw-r--r-- | src/vhdl/vhdl-nodes_walk.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb index 0bbddef3b..7a539a030 100644 --- a/src/vhdl/vhdl-nodes_walk.adb +++ b/src/vhdl/vhdl-nodes_walk.adb @@ -157,7 +157,8 @@ package body Vhdl.Nodes_Walk is while Is_Valid (El) loop case Iir_Kinds_Concurrent_Statement (Get_Kind (El)) is when Iir_Kinds_Simple_Concurrent_Statement - | Iir_Kind_Component_Instantiation_Statement => + | Iir_Kind_Component_Instantiation_Statement + | Iir_Kind_Psl_Default_Clock => Status := Cb.all (El); when Iir_Kind_Block_Statement => Status := Cb.all (El); |